AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 60

• Manufacturer Part Number: AMD-K6
• Description: AMD-K6 Processor
• Manufacturer: AMD [Advanced Micro Devices]

AMD-K6
Paging
Figure 35. 4-Kbyte Paging Mechanism
42
31
®
Processor Data Sheet
CR3
Page Directory
Offset
The AMD-K6 processor can address up to 4 Gbytes of memory.
This memory can be segmented into pages. The size of these
pages is determined by the operating system design and the
values set up in the Page Directory Entries (PDE) and Page
Table Entries (PTE). The processor can access both 4-Kbyte
pages and 4-Mbyte pages, and the page sizes can be intermixed
within a page directory. When the Page Size Extension (PSE)
bit in CR4 is set, the processor translates linear addresses using
either the 4-Kbyte Translation Lookaside Buffer (TLB) or the
4-Mbyte TLB, depending on the state of the page size (PS) bit in
the page directory entry. Figures 35 and 36 show how 4-Kbyte
and 4-Mbyte page translations work.
Directory
Page
PDE
22
21
Preliminary Information
Software Environment
Page Table
Linear Address
Offset
Table
Page
PTE
12
11
Offset
Page
Physical
Address
4-Kbyte
Frame
Page
20695H/0—March 1998
Chapter 3
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