STPC4EDBC STMICROELECTRONICS [STMicroelectronics], STPC4EDBC Datasheet - Page 30

• Manufacturer Part Number: STPC4EDBC
• Description: X86 Core PC Compatible Information Appliance System-on-Chip
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STRAP OPTIONS
3.1.3. ADPC STRAP REGISTER 2 CONFIGURATION
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Strap2
Bit Number Sampled
See Table
below
7
Bit 6-5
Bits 7
Bits 4
Bit 3
Bit 2
Bit 1
Bit 0
6
This register defaults to the values sampled on MD pins after reset
Rsv
Mnemonic
MD[40]
MD[20]
MD[17]
Rsv
Rsv
Rsv
Rsv
Rsv
Rsv
5
Release 1.5 - January 29, 2002
Access = 0022h/0023h
Reserved
Description
For the parts referenced STPCC4, Reserved
For the parts referenced STPCC5, this bit reflects the value sampled on
MD[40] is used is used to set the clock multiplication factor of the 486
core, as follows:
MD[40]
This strap is not readable in a register for the STPCC4.
Reserved
This bit reflects the value sampled on MD[20] pin and controls
the Dot clock (DCLK) source as follows:
internal frequency synthesizer output. Note this bit is writeable
as well as readable.
Reserved
For the parts referenced STPCC4, see section
For the parts referenced STPCC5.This bit is reserved and not connected
Reserved
0: External. DCLK pin is an input.
1: Internal. DCLK pin is an output and is connected to the
MD[20]
0
1
4
DX2 (X2)
DX (X1)
MD[19]
3
MD[18]
2
See Table
below
Section
1
Regoffset = 04Ch
3.1.1.bits 1:0.
Rsv
0