STPC4EDBC STMICROELECTRONICS [STMicroelectronics], STPC4EDBC Datasheet - Page 86
![no-image](/images/no-image-200.jpg)
STPC4EDBC
Manufacturer Part Number
STPC4EDBC
Description
X86 Core PC Compatible Information Appliance System-on-Chip
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STPC4EDBC.pdf
(93 pages)
- Current page: 86 of 93
- Download datasheet (2Mb)
DESIGN GUIDELINES
As the PCB acts as a heat sink, the layout of top
and ground layers must be done with care to
maximize the board surface dissipating the heat.
The only limitation is the risk of losing routing
channels.
86/93
A
1
Figure 6-31
Figure 6-31. Layout for Good Thermal Dissipation - top layer
and
Figure 6-32
STPC ball
Via
Not Connected ball
Release 1.5 - January 29, 2002
show a
routing with a good thermal dissipation thanks to
an optimized placement of power and signal vias.
The ground plane should be on bottom layer for
the best heat spreading (thicker layer than internal
ones) and dissipation (direct contact with air). .
GND ball
3.3V ball
2.5V ball (Core / PLLs)
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