STPC4EDBC STMICROELECTRONICS [STMicroelectronics], STPC4EDBC Datasheet - Page 50

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STPC4EDBC

Manufacturer Part Number
STPC4EDBC
Description
X86 Core PC Compatible Information Appliance System-on-Chip
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
ELECTRICAL SPECIFICATIONS
The
are the register value for Setup time, Active Time
50/93
Memory (FCSx#)
Peripheral (IOCSx#)
Name
Table 4-14
Cycle
Parameters
HCLK to PA bus
HCLK to PD bus
HCLK to FCS#[1:0]
HCLK to IOCS#[3:0]
HCLK to PWR#[1:0]
HCLK to PRD#[1:0]
PD[15:0] Input setup to HCLK
PD[15:0] Input hold to HCLK
PRDY Input setup to HCLK
PRDY Input hold to HCLK
below refers to Vh, Va, Vs which
Table 4-15. Local Bus Interface AC Timing
4 + Vh
8 + Vh
T
setup
Table 4-14. Local Bus cycle lenght
Release 1.5 - January 29, 2002
2 + Va
3 + Va
T
active
and Hold time, as described in the Programming
Manual.
4 + Vs
4 + Vs
T
hold
Min
2
2
-
-
-
-
-
-
-
-
T
end
4
4
Max
15
15
15
15
15
15
4
4
-
-
HCLK
HCLK
Unit
Units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS

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