ENC28J60-C/ML MICROCHIP [Microchip Technology], ENC28J60-C/ML Datasheet - Page 25

• Manufacturer Part Number: ENC28J60-C/ML
• Description: Stand-Alone Ethernet Controller with SPI Interface
• Manufacturer: MICROCHIP [Microchip Technology]

REGISTER 3-5:
© 2006 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Read-only bit
-n = Value at POR
bit 15-13
bit 12
bit 11
bit 10-3
bit 2
bit 1
bit 0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
PFDPX: PHY Full-Duplex Capable bit
1 = PHY is capable of operating at 10 Mbps in Full-Duplex mode (this bit is always set)
PHDPX: PHY Half-Duplex Capable bit
1 = PHY is capable of operating at 10 Mbps in Half-Duplex mode (this bit is always set)
Unimplemented: Read as ‘0’
LLSTAT: PHY Latching Link Status bit
1 = Link is up and has been up continously since PHSTAT1 was last read
0 = Link is down or was down for a period since PHSTAT1 was last read
JBSTAT: PHY Latching Jabber Status bit
1 = PHY has detected a transmission meeting the jabber criteria since PHSTAT1 was last read
0 = PHY has not detected any jabbering transmissions since PHSTAT1 was last read
Unimplemented: Read as ‘0’
U-0
U-0
—
—
PHSTAT1: PHYSICAL LAYER STATUS REGISTER 1
‘1’ = Bit is set
‘0’ = Bit is cleared
R/L = Read-only latch bit
U-0
U-0
—
—
PFDPX
R-1
U-0
—
Preliminary
U = Unimplemented bit, read as ‘0’
LL = Bit latches low
PHDPX
R-1
U-0
—
LLSTAT
R/LL-0
U-0
—
LH = Bit latches high
ENC28J60
JBSTAT
R/LH-0
U-0
—
DS39662B-page 23
U-0
U-0
—
—
bit 8
bit 0