ENC28J60-C/ML MICROCHIP [Microchip Technology], ENC28J60-C/ML Datasheet - Page 47

• Manufacturer Part Number: ENC28J60-C/ML
• Description: Stand-Alone Ethernet Controller with SPI Interface
• Manufacturer: MICROCHIP [Microchip Technology]

7.2.4
After the host controller has processed a packet (or part
of the packet) and wishes to free the buffer space used
by the processed data, the host controller must
advance the Receive Buffer Read Pointer, ERXRDPT.
The ENC28J60 will always write up to, but not includ-
ing, the memory pointed to by the Receive Buffer Read
Pointer. If the ENC28J60 ever attempts to overwrite the
Receive Buffer Read Pointer location, the packet in
progress will be aborted, the EIR.RXERIF will be set
and an interrupt will be generated (if enabled). In this
manner,
unprocessed packets. Normally, the ERXRDPT will be
advanced to the value pointed to by the next Packet
Pointer which precedes the receive status vector for
the current packet. Following such a procedure will not
require any Pointer calculations to account for
wrapping at the end of the circular receive buffer.
The
(ERXRDPTL register) is internally buffered to prevent
the Pointer from moving when only one byte is updated
through the SPI. To move ERXRDPT, the host control-
ler must write to ERXRDPTL first. The write will update
the internal buffer but will not affect the register. When
the host controller writes to ERXRDPTH, the internally
buffered low byte will be loaded into the ERXRDPTL
register at the same time. The ERXRDPT bytes can be
read in any order. When they are read, the actual value
of the registers will be returned. As a result, the
buffered low byte is not readable.
In addition to advancing the Receive Buffer Read
Pointer, after each packet is fully processed, the host
controller must write a ‘1’ to the ECON2.PKTDEC bit.
Doing so will cause the EPKTCNT register to
decrement by 1. After decrementing, if EPKTCNT is ‘0’,
the EIR.PKTIF flag will automatically be cleared.
Otherwise, it will remain set, indicating that additional
packets are in the receive buffer and are waiting to be
processed. Attempts to decrement EPKTCNT below 0
are ignored. Additionally, if the EPKTCNT register ever
maximizes at 255, all new packets which are received
will be aborted, even if buffer space is available.
indicate the error, the EIR.RXERIF will be set and an
interrupt will be generated (if enabled). To prevent this
condition, the host controller must properly decrement
the counter whenever a packet is processed.
EXAMPLE 7-2:
© 2006 Microchip Technology Inc.
if ERXWRPT > ERXRDPT, then
else if ERXWRPT = ERXRDPT, then
else
Receive
the
FREEING RECEIVE BUFFER SPACE
Free Space = (ERXND – ERXST) – (ERXWRPT – ERXRDPT)
Free Space = (ERXND – ERXST)
Free Space = ERXRDPT – ERXWRPT – 1
Buffer
hardware
RECEIVE BUFFER FREE SPACE CALCULATION
Read
will
Pointer
never
Low
overwrite
Byte
Preliminary
To
Because only one Pointer is available to control buffer
area ownership, the host controller must process pack-
ets in the order they are received. If the host controller
wishes to save a packet to be processed later, it should
copy the packet to an unused location in memory. It
may accomplish this efficiently using the integrated
DMA controller (see Section 13.0 “Direct Memory
Access Controller”).
7.2.5
At any time the host controller wishes to know how
much receive buffer space is remaining, it should read
the Hardware Write Pointer (ERXWRPT registers) and
compare it with the ERXRDPT registers. Combined
with the known size of the receive buffer, the free space
can be derived.
When reading the ERXWRPT register with the receive
hardware enabled, special care must be taken to
ensure the low and high bytes are read as a matching
set.
To be assured that a matching set is obtained:
1.
2.
3.
4.
With the Hardware Write Pointer obtained, the free
space can be calculated as shown in Example 7-2. The
hardware prohibits moving the Write Pointer to the
same value occupied by ERXRDPT (except when the
Buffer Pointers are being configured), so at least one
byte will always go unused in the buffer. The example
calculation reflects the lost byte.
Note:
Read the EPKTCNT register and save its
contents.
Read ERXWRPTL and ERXWRPTH.
Read the EPKTCNT register again.
Compare the two packet counts. If they are not
the same, go back to step 2.
RECEIVE BUFFER FREE SPACE
The ERXWRPT registers only update
when a packet has been successfully
received. If the host controller reads it just
before another packet is to be successfully
completed, the value returned could be
stale and off by the maximum frame length
permitted (MAMXFLN) plus 7. Further-
more, as the host controller reads one
byte of ERXWRPT, a new packet may
arrive and update the Pointer before the
host controller has an opportunity to read
the other byte of ERXWRPT.
ENC28J60
DS39662B-page 45