ENC28J60-C/ML MICROCHIP [Microchip Technology], ENC28J60-C/ML Datasheet - Page 68

• Manufacturer Part Number: ENC28J60-C/ML
• Description: Stand-Alone Ethernet Controller with SPI Interface
• Manufacturer: MICROCHIP [Microchip Technology]

ENC28J60
REGISTER 12-3:
DS39662B-page 66
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
Unimplemented: Read as ‘0’
PKTIF: Receive Packet Pending Interrupt Flag bit
1 = Receive buffer contains one or more unprocessed packets; cleared when PKTDEC is set
0 = Receive buffer is empty
DMAIF: DMA Interrupt Flag bit
1 = DMA copy or checksum calculation has completed
0 = No DMA interrupt is pending
LINKIF: Link Change Interrupt Flag bit
1 = PHY reports that the link status has changed; read PHIR register to clear
0 = Link status has not changed
TXIF: Transmit Interrupt Flag bit
1 = Transmit request has ended
0 = No transmit interrupt is pending
Reserved: Maintain as ‘0’
TXERIF: Transmit Error Interrupt Flag bit
1 = A transmit error has occurred
0 = No transmit error has occurred
RXERIF: Receive Error Interrupt Flag bit
1 = A packet was aborted because there is insufficient buffer space or the packet count is 255
0 = No receive error interrupt is pending
PKTIF
R-0
EIR: ETHERNET INTERRUPT REQUEST (FLAG) REGISTER
C = Clearable bit
‘1’ = Bit is set
DMAIF
R/C-0
LINKIF
R-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/C-0
TXIF
R-0
r
© 2006 Microchip Technology Inc.
x = Bit is unknown
TXERIF
R/C-0
RXERIF
R/C-0
bit 0