LAN91C96_07 SMSC [SMSC Corporation], LAN91C96_07 Datasheet - Page 30
LAN91C96_07
Manufacturer Part Number
LAN91C96_07
Description
Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN91C96_07.pdf
(125 pages)
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5.2
Rev. 03-28-07
8 BIT MODE
((IOis8=1) +
(nEN16=1).
(16BIT=0))
16 BIT MODE
otherwise
16BIT:
IOis8:
nEN16:
8 Bit mode:
Interrupt Structure
The Ethernet interrupt is conceptually equivalent to the LAN91C94 interrupt line, it is the or function of all
enabled interrupts within the Ethernet core. The enabling, reporting, and clearing of these sources is
controlled by the ECOR register. The interrupt structure is similar for LOCAL BUS and PCMCIA modes
with the following exceptions:
PCMCIA uses a single interrupt pin (nIREQ) while LOCAL BUS can use any of four INTR0-3 pins.
8 BIT MODE
16 BIT MODE
(A0=0).(nSBHE=0)
CONFIGURATION REGISTER bit 7
CSR register bit 5
pin nEN16
((IOis8 = 1) + (nMIS16 = 1)
A0
X
X
X
0
1
0
0
1
Table 5.3 - Bus Transactions In PCMCIA Mode
Table 5.4 - Bus Transactions In 68000 Mode
NCE1
0
0
1
0
0
0
1
1
DATASHEET
NCE2
Even byte
Page 30
X
X
X
0
1
1
0
1
D0-7
Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
ILLEGAL ACCESS
Even byte
Even byte
Even byte
Odd byte
Odd byte
D0-7
-
Odd byte
NO CYCLE
NO CYCLE
D8-15
Odd byte
Odd byte
D8-15
SMSC LAN91C965v&3v
-
-
-
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