LAN91C96_07 SMSC [SMSC Corporation], LAN91C96_07 Datasheet - Page 8

• Manufacturer Part Number: LAN91C96_07
• Description: Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
• Manufacturer: SMSC [SMSC Corporation]

Rev. 03-28-07
High performance:
Chained ("Back-to-back") packet handling with no CPU intervention:
Fast block move operation for load/unload:
Fast bus interface:
Flexibility:
Flexible packet and header processing:
Resource allocation:
Configuration:
LOCAL BUS:
PCMCIA:
PCMCIA interface
68000 interface
EEPROM interface
Encoder/decoder with AUI interface
10BASE-T transceiver
Queues transmit packets
Queues receive packets
Stores results in memory along with packet
Queues interrupts
Optional single interrupt upon completion of transmit chain
CPU sees packet bytes as if stored continuously.
Handles 16 bit transfers regardless of address alignment.
Access to packet through fixed window.
Compatible with LOCAL BUS type and faster buses.
Can be set to Simultasking - Early Receive and Transmit modes. With enhanced Early Receive
functions.
Can access any byte in the packet.
Can immediately remove undesired packets from queue.
Can move packets from receive to transmit queue.
Can alter receive processing order without copying data.
Can discard or enqueue again a failed transmission.
Memory dynamically allocated for transmit and receive.
Can automatically release memory on successful transmission.
Uses non-volatile jumperless setup via serial EEPROM.
Uses ROM or Flash ROM for attribute memory storage and optional serial EEPROM for IEEE
address storage. PCMCIA I/O ignores address lines A4-A15 and relies on the PCMCIA host,
decoding for the slot.
nROM/nPCMCIA, on LAN91C96, is left open with a pullup for LOCAL BUS mode. This pin is
sampled at the end of RESET. If found low, the LAN91C96 is configured for PCMCIA mode.
DATASHEET
Page 8
Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
SMSC LAN91C965v&3v