LAN91C96_07 SMSC [SMSC Corporation], LAN91C96_07 Datasheet - Page 34

• Manufacturer Part Number: LAN91C96_07
• Description: Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
• Manufacturer: SMSC [SMSC Corporation]

NO.
7S
8S
4
5
6
7
8
Rev. 03-28-07
By writing a 0 to
CTR PWRDWN and
0 to WAKEUP_EN
bits
By writing 1 to
ECOR Func Enable,
0 to ECSR Power
Down, 0 to CTR
PWRDWN
By writing 1 to
ECOR Func Enable,
0 to ECSR Power
Down, 0 to CTR
PWRDWN, and 0 to
WAKEUP_EN bit
By writing 0 to
ECSR Power Down
bit*
By writing 0 to
ECSR Power Down
and a 0 to CTR
PWRDWN bit
By writing 0 to
ECSR Power Down
and writing CTR
PWRDWN bit = 0 &
WAKEUP_EN = 0, if
needed
By writing 0 to
ECSR Power Down
and writing CTR
PWRDWN bit = 0 &
WAKEUP_EN = 0, if
needed
WAKES UP BY
PCMCIA Attribute Memory
Address 0- 7FFEh
The Attribute Memory is implemented using an external parallel EEPROM, ROM or Flash ROM. A parallel
EEPROM (or equivalent external device) must be used for CIS.
In LOCAL BUS mode, serial EEPROM is used for configuration and IEEE Node address making it software
compatible to the LAN9xxx family of Ethernet LAN Controllers. The EEPROM is optional for both LOCAL BUS
and PCMCIA requiring a Minimum size of 64 X 16 bit word addresses.
The LAN91C96 generates the appropriate control lines (nFCS and nFWE) to read and write the Attribute
memory, and it tri-states the data bus during external Attribute Memory accesses. Only even locations are
used.
PWR DWN PIN
(A= ASSRTD)
nA
nA
nA
nA
nA
nA
nA
DATASHEET
ENABLE
ECOR
FUNC
1
1
1
1
1
1
1
Page 34
Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
NEXT STATE
DOWN
ECSR
PWR
0
0
0
0
0
0
0
PWRDWN
CTR
BIT
0
0
0
0
0
0
0
WAKEUP_EN
CTR
BIT
0
0
0
0
0
0
0
SMSC LAN91C965v&3v
Note: Both
Power down
bits need to be
written as 0
only if both
were set to 1
Note: Both
Power down
bits need to be
written as 0
only if both
were set to 1
Note: Both
Power down
bits need to be
written as 0
only if both
were set to 1
COMMENTS