PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 118
PIC18F25J50
Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F25J50.pdf
(562 pages)
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PIC18F46J50 FAMILY
REGISTER 9-2:
DS39931D-page 118
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note:
R/W-1
RBPU
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding
enable bit or the Global Interrupt Enable bit. User software should ensure the appropriate interrupt flag bits
are clear prior to enabling an interrupt. This feature allows for software polling.
RBPU: PORTB Pull-up Enable bit
1 = All PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual PORT TRIS values
INTEDG0: External Interrupt 0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG1: External Interrupt 1 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG2: External Interrupt 2 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG3: External Interrupt 3 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
INT3IP: INT3 External Interrupt Priority bit
1 = High priority
0 = Low priority
RBIP: RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
INTEDG0
R/W-1
INTCON2: INTERRUPT CONTROL REGISTER 2 (ACCESS FF1h)
W = Writable bit
‘1’ = Bit is set
INTEDG1
R/W-1
INTEDG2
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
INTEDG3
R/W-1
TMR0IP
R/W-1
2011 Microchip Technology Inc.
x = Bit is unknown
INT3IP
R/W-1
R/W-1
RBIP
bit 0
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