PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 374
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PIC18F25J50
Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F25J50.pdf
(562 pages)
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PIC18F46J50 FAMILY
22.5.1.1
The ACTVIF bit cannot be cleared immediately after
the USB module wakes up from Suspend or while the
USB module is suspended. A few clock cycles are
required to synchronize the internal hardware state
machine before the ACTVIF bit can be cleared by
firmware. Clearing the ACTVIF bit before the internal
hardware is synchronized may not have an effect on
the value of ACTVIF. Additionally, if the USB module
uses the clock from the 96 MHz PLL source, then after
clearing the SUSPND bit, the USB module may not be
EXAMPLE 22-1:
DS39931D-page 374
Assembly:
LOOP:
DONE:
C:
UCONbits.SUSPND = 0;
while (UIRbits.ACTVIF) { UIRbits.ACTVIF = 0; }
BCF
BTFSS
BRA
BCF
BRA
Bus Activity Detect Interrupt Bit
(ACTVIF)
UCON, SUSPND
UIR, ACTVIF
DONE
UIR, ACTVIF
LOOP
CLEARING ACTVIF BIT (UIR<2>)
immediately operational while waiting for the 96 MHz
PLL to lock. The application code should clear the
ACTVIF flag as provided in
Note:
Only one ACTVIF interrupt is generated
when resuming from the USB bus Idle con-
dition. If user firmware clears the ACTVIF
bit, the bit will not immediately become set
again, even when there is continuous bus
traffic. Bus traffic must cease long enough
to generate another IDLEIF condition
before another ACTVIF interrupt can be
generated.
2011 Microchip Technology Inc.
Example
22-1.
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