MC68HC912D60A MOTOROLA [Motorola, Inc], MC68HC912D60A Datasheet - Page 16
MC68HC912D60A
Manufacturer Part Number
MC68HC912D60A
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912D60A.pdf
(460 pages)
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List of Figures
Technical Data
16
14-3 8-Bit Pulse Accumulators Block Diagram . . . . . . . . . . . . . . . .227
14-4 16-Bit Pulse Accumulators Block Diagram . . . . . . . . . . . . . . .228
14-5 Block Diagram for Port7 with Output compare /
14-6 C3F-C0F Interrupt Flag Setting . . . . . . . . . . . . . . . . . . . . . . .229
15-1 Multiple Serial Interface Block Diagram . . . . . . . . . . . . . . . . .264
15-2 Serial Communications Interface Block Diagram . . . . . . . . . . 265
15-3 Serial Peripheral Interface Block Diagram . . . . . . . . . . . . . . . 277
15-4 SPI Clock Format 0 (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . .278
15-5 SPI Clock Format 1 (CPHA = 1) . . . . . . . . . . . . . . . . . . . . . . .279
15-6 Normal Mode and Bidirectional Mode. . . . . . . . . . . . . . . . . . . 280
16-1 MI Bus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .290
16-2 Biphase coding and error detection . . . . . . . . . . . . . . . . . . . . 292
16-3 MI BUS Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .293
16-4 A typical MI Bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . .295
17-1 The CAN System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 305
17-2 User Model for Message Buffer Organization. . . . . . . . . . . . . 308
17-3 32-bit Maskable Identifier Acceptance Filters . . . . . . . . . . . . . 312
17-4 16-bit Maskable Acceptance Filters . . . . . . . . . . . . . . . . . . . . 312
17-5 8-bit Maskable Acceptance Filters . . . . . . . . . . . . . . . . . . . . . 313
17-6 SLEEP Request / Acknowledge Cycle . . . . . . . . . . . . . . . . . . 319
17-7 Clocking Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
17-8 Segments within the Bit Time . . . . . . . . . . . . . . . . . . . . . . . . . 323
17-9 msCAN12 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . .324
17-10 Message Buffer Organization . . . . . . . . . . . . . . . . . . . . . . . . . 325
17-11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
17-12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
18-1 Analog-to-Digital Converter Block Diagram . . . . . . . . . . . . . . 350
19-1 BDM Host to Target Serial Bit Timing. . . . . . . . . . . . . . . . . . . 381
19-2 BDM Target to Host Serial Bit Timing (Logic 1) . . . . . . . . . . .381
19-3 BDM Target to Host Serial Bit Timing (Logic 0) . . . . . . . . . . .382
20-1 Timer Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .414
20-2 POR and External Reset Timing Diagram . . . . . . . . . . . . . . . 415
20-3 STOP Recovery Timing Diagram . . . . . . . . . . . . . . . . . . . . . .416
20-4 WAIT Recovery Timing Diagram . . . . . . . . . . . . . . . . . . . . . . 417
20-5 Interrupt Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418
20-6 Port Read Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . .419
20-7 Port Write Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . .419
Freescale Semiconductor, Inc.
For More Information On This Product,
Pulse Accumulator A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .229
Go to: www.freescale.com
List of Figures
MC68HC912D60A — Rev 3.0
MOTOROLA
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