MC68HC912D60A MOTOROLA [Motorola, Inc], MC68HC912D60A Datasheet - Page 285
MC68HC912D60A
Manufacturer Part Number
MC68HC912D60A
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912D60A.pdf
(460 pages)
- Current page: 285 of 460
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PORTS — Port S Data Register
15.6 Port S
DDRS — Data Direction Register for Port S
MC68HC912D60A — Rev 3.0
MOTOROLA
Function
RESET:
Pin
DDS7
Bit 7
Bit 7
PS7
SS
CS
0
DDS6
SCK
PS6
6
0
6
some slave devices are very simple and either accept data from the
master without returning data to the master or pass data to the master
without requiring data from the master.
In all modes, port S bits PS[7:0] can be used for either general-purpose
I/O, or with the SCI and SPI subsystems. During reset, port S pins are
configured as high-impedance inputs (DDRS is cleared).
Read anytime (inputs return pin level; outputs return pin driver input
level). Write data stored in internal latch (drives pins only if configured for
output). Writes do not change pin state when pin configured for SPI or
SCI output.
After reset all bits are configured as general-purpose inputs.
Port S shares function with the on-chip serial systems (SPI and SCI0/1).
Read or write anytime.
After reset, all general-purpose I/O are configured for input only.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Configure the corresponding I/O pin for input only
1 = Configure the corresponding I/O pin for output
MOMI
DDS5
MOSI
PS5
5
5
0
Go to: www.freescale.com
Multiple Serial Interface
DDS4
MISO
SISO
PS4
4
4
0
DDS3
TXD1
PS3
3
0
3
DDS2
RXD1
PS2
2
0
2
DDS1
TXD0
PS1
1
0
1
Multiple Serial Interface
DDS0
RXD0
Bit 0
Bit 0
PS0
0
Technical Data
$00D6
$00D7
Port S
285
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