MC68HC912D60A MOTOROLA [Motorola, Inc], MC68HC912D60A Datasheet - Page 277

• Manufacturer Part Number: MC68HC912D60A
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC912D60A — Rev 3.0
MOTOROLA
SP0BR SPI BAUD RATE REGISTER
÷
2
÷
INTERRUPT
4
REQUEST
÷
SPI
8
(SAME AS E RATE)
MCU P CLOCK
÷
16
SELECT
DIVIDER
÷
Figure 15-3. Serial Peripheral Interface Block Diagram
32
SP0SR SPI STATUS REGISTER
SPI CONTROL
÷
64
A clock phase control bit (CPHA) and a clock polarity control bit (CPOL)
in the SP0CR1 register select one of four possible clock formats to be
used by the SPI system. The CPOL bit simply selects non-inverted or
inverted clock. The CPHA bit is used to accommodate two
fundamentally different protocols by shifting the clock by one half cycle
or no phase shift.
÷
128
Freescale Semiconductor, Inc.
For More Information On This Product,
÷
256
Go to: www.freescale.com
Multiple Serial Interface
SP0DR SPI DATA REGISTER
SHIFT CONTROL LOGIC
8-BIT SHIFT REGISTER
READ DATA BUFFER
INTERNAL BUS
MSTR
SPE
SP0CR1 SPI CONTROL REGISTER 1
CLOCK
LOGIC
CLOCK
SWOM
LSBF
SP0CR2 SPI CONTROL REGISTER 2
Serial Peripheral Interface (SPI)
CONTROL
S
M
M
S
S
M
LOGIC
PIN
Multiple Serial Interface
MISO
MOSI
SCK
PS7
PS4
PS5
PS6
SS
Technical Data
277