MC68HC912D60A MOTOROLA [Motorola, Inc], MC68HC912D60A Datasheet - Page 366

• Manufacturer Part Number: MC68HC912D60A
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

ATD0CTL5/ATD1CTL5 — ATD Control Register 5
Analog-to-Digital Converter
18.9.4 ATDCTL5 ATD Control Register 5
Technical Data
366
RESET:
Bit 7
0
0
S8C
6
0
ATD control register 5 determines the type of conversion sequence and
the analog input channels sampled. All writes to this register have an
immediate effect. If a conversion is in progress, the entire conversion
sequence is aborted. A write to this register (or ATDCTL4) initiates a new
conversion sequence (SCF and CCF bits are reset).
S8C / S1C — Conversion Sequence Length
1. Maximum conversion frequency is 2 MHz. Maximum PCLK divisor value will become
2. Minimum conversion frequency is 500 kHz. Minimum PCLK divisor value will become
S8C: Bit Position: 6, ATDCTL5
S1C: Bit Position: 3, ATDCTL3
The S8C/S1C bits define the length of a conversion sequence.
18-6
Freescale Semiconductor, Inc.
Prescale
maximum conversion rate that can be used on this ATD module.
minimum conversion rate that this ATD can perform.
For More Information On This Product,
Value
00000
00001
00010
00011
00100
00101
00110
00111
01xxx
1xxxx
SCAN
lists the coding combinations.
5
0
Analog-to-Digital Converter
Go to: www.freescale.com
Total Divisor
MULT
Table 18-5. Clock Prescaler Values
4
0
÷10
÷12
÷14
÷16
÷2
÷4
÷6
÷8
SC
3
0
Max PCLK
4 MHz
8 MHz
8 MHz
8 MHz
8 MHz
8 MHz
8 MHz
8 MHz
CC
Do Not Use
2
0
(1)
MC68HC912D60A — Rev 3.0
CB
1
0
Min PCLK
Bit 0
CA
1 MHz
2 MHz
3 MHz
4 MHz
5 MHz
6 MHz
7 MHz
8 MHz
0
$0065/$01E5
MOTOROLA
(2)
Table