HD6417606 RENESAS [Renesas Technology Corp], HD6417606 Datasheet - Page 25

• Manufacturer Part Number: HD6417606
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Host Interface (HIF)
Table 13.1
Table 13.2
Table 13.3
Table 13.4
Table 13.5
Table 13.6
Section 14 Pin Function Controller (PFC)
Table 14.1
Table 14.2
Table 14.3
Table 14.4
Table 14.5
Table 14.6
Section 15 I/O Ports
Table 15.1
Table 15.2
Table 15.3
Table 15.4
Table 15.5
Section 16 User Break Controller (UBC)
Table 16.1
Section 17 User Debugging Interface (H-UDI)
Table 17.1
Table 17.2
Table 17.3
Table 17.4
Section 19 Electrical Characteristics
Table 19.1
Table 19.2
Table 19.3
Table 19.4
Table 19.4
Table 19.5
Table 19.6
Table 19.7
Table 19.8
Table 19.9
Pin Configuration.................................................................................................. 303
HIF Operations ..................................................................................................... 304
Memory Map ........................................................................................................ 319
Consecutive Write Procedure to HIFRAM by External DMAC........................... 326
Consecutive Read Procedure from HIFRAM by External DMAC....................... 327
Input/Output Control for HIF Pins........................................................................ 330
List of Multiplexed Pins (Port A) ......................................................................... 333
List of Multiplexed Pins (Port B).......................................................................... 334
List of Multiplexed Pins (Port C).......................................................................... 336
List of Multiplexed Pins (Port D) ......................................................................... 336
List of Multiplexed Pins (Port E).......................................................................... 337
Pin Functions in Each Operating Mode ................................................................ 338
Port A Data Register H (PADRH) Read/Write Operation .................................... 364
Port B Data Register L (PBDRL) Read/Write Operation ..................................... 366
Port C Data Registers H and L (PCDRH and PCDRL) Read/Write Operation .... 369
Port D Data Register L (PDDRL) Read/Write Operation..................................... 371
Port E Data Registers H, L (PEDRH, PEDRL) Read/Write Operation ................ 374
Data Access Cycle Addresses and Operand Size Comparison Conditions ........... 391
Pin Configuration.................................................................................................. 401
H-UDI Commands................................................................................................ 403
External Pins and Boundary Scan Register Bits ................................................... 404
Reset Configuration .............................................................................................. 411
Absolute Maximum Ratings ................................................................................. 439
Recommended Timing at Power-On..................................................................... 440
Recommended Timing in Power-Off.................................................................... 441
DC Characteristics (1)........................................................................................... 442
DC Characteristics (2)........................................................................................... 443
Permissible Output Currents ................................................................................. 444
Maximum Operating Frequency ........................................................................... 444
Clock Timing ........................................................................................................ 445
Control Signal Timing .......................................................................................... 448
Bus Timing ........................................................................................................... 450
Rev. 4.00 Sep. 13, 2007 Page xxv of xxvi