HD6417606 RENESAS [Renesas Technology Corp], HD6417606 Datasheet - Page 67

• Manufacturer Part Number: HD6417606
• Manufacturer: RENESAS [Renesas Technology Corp]

• Arithmetic Operation Instructions
Instruction
ADD
ADD
ADDC
ADDV
CMP/EQ #imm,R0
CMP/EQ Rm,Rn
CMP/HS Rm,Rn
CMP/GE Rm,Rn
CMP/HI Rm,Rn
CMP/GT Rm,Rn
CMP/PZ Rn
CMP/PL Rn
CMP/STR Rm,Rn
DIV1
DIV0S
DIV0U
DMULS.L
Rm,Rn
#imm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Operation
Rn + Rm → Rn
Rn + imm → Rn
Rn + Rm + T → Rn,
Carry → T
Rn + Rm → Rn,
Overflow → T
If R0 = imm, 1 → T
If Rn = Rm, 1 → T
If Rn ≥ Rm with
unsigned data, 1 → T
If Rn ≥ Rm with signed
data, 1 → T
If Rn > Rm with
unsigned data, 1 → T
If Rn > Rm with signed
data, 1 → T
If Rn ≥ 0, 1 → T
If Rn > 0, 1 → T
If Rn and Rm have an
equivalent byte, 1 → T
Single-step division
(Rn/Rm)
MSB of Rn → Q, MSB
of Rm → M, M^ Q → T
0 → M/Q/T
Signed operation of
Rn × Rm → MACH,
MACL 32 × 32 → 64 bits
Code
0011nnnnmmmm1100
0111nnnniiiiiiii
0011nnnnmmmm1110
0011nnnnmmmm1111
10001000iiiiiiii
0011nnnnmmmm0000
0011nnnnmmmm0010
0011nnnnmmmm0011
0011nnnnmmmm0110
0011nnnnmmmm0111
0100nnnn00010001
0100nnnn00010101
0010nnnnmmmm1100
0011nnnnmmmm0100
0010nnnnmmmm0111
0000000000011001
0011nnnnmmmm1101
Rev. 4.00 Sep. 13, 2007 Page 41 of 502
Execution
Cycles
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2 to 5*
REJ09B0239-0400
Section 2 CPU
T Bit


Carry
Overflow
Comparison
result
Comparison
result
Comparison
result
Comparison
result
Comparison
result
Comparison
result
Comparison
result
Comparison
result
Comparison
result
Calculation
result
Calculation
result
0
