HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 45

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Table 18.4
Table 18.5
Table 18.6
Table 18.7
Table 18.8
Table 18.9
Table 18.10
Section 19 A/D Converter (ADC)
Table 19.1 A/D Converter Pins...................................................................................................497
Table 19.2
Table 19.3
Table 19.4
Table 19.5
Section 20 D/A Converter (DAC)
Table 20.1
Section 21 User Debugging Interface (H-UDI)
Table 21.1
Table 21.2
Table 21.3
Section 22 Power-Down Modes
Table 22.1
Table 22.2
Table 22.3
Section 24 Electrical Characteristics
Table 24.1
Table 24.2
Table 24.3
Table 24.4
Table 24.5
Table 24.6
Table 24.7
Table 24.8
Table 24.9
Table 24.10
Table 24.11
Table 24.12
Read/Write Operation of the Port E Data Register (PEDR) .................................486
Read/Write Operation of the Port F Data Register (PFDR) ..................................487
Read/Write Operation of the Port G Data Register (PGDR).................................489
Read/Write Operation of the Port H Data Register (PHDR).................................491
Read/Write Operation of the Port J Data Register (PJDR) ...................................492
Read/Write Operation of the SC Port Data Register (SCPDR).............................494
Analog Input Channels and A/D Data Registers...................................................498
A/D Conversion Time (Single Mode)...................................................................509
Analog Input Pin Ratings......................................................................................512
Relationship between Access Size and Read Data................................................512
D/A Converter Pins...............................................................................................514
Pin Configuraiton..................................................................................................518
This LSI's Pins and Boundary Scan Register Bits.................................................520
Reset Configuration ..............................................................................................526
Power-Down Modes .............................................................................................531
Pin Configuration..................................................................................................532
Register States in Software Standby Mode ...........................................................536
Absolute Maximum Ratings .................................................................................569
DC Characteristics (Ta = –20 to 75°C) .................................................................571
Permitted Output Current Values (VccQ = 3.3 ± 0.3 V, Vcc = 1.9 ± 0.15 V,
AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C) ................................................................573
Operating Frequency Range..................................................................................574
Clock Timing ........................................................................................................574
Control Signal Timing ..........................................................................................580
Bus Timing (Clock Modes 0/1/2/7) .....................................................................583
Peripheral Module Signal Timing.........................................................................615
H-UDI, AUD Related Pin Timing ........................................................................618
A/D Converter Timing ..........................................................................................620
A/D Converter Characteristics (VccQ = 3.3 ± 0.3 V, Vcc = 1.9 ± 0.15 V,
AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C) ................................................................624
D/A Converter Characteristics (VccQ = 3.3 ± 0.3 V, Vcc = 1.9 ± 0.15 V,
AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C) ................................................................624
Read/Write Operation of the Port D Data Register (PDDR)................................484
Rev. 4.00, 03/04, page xlv of xlvi