HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 455

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

3. Setting the serial control register (SCSCR): The TIE, RIE, TE and RE bits function as they do
4. Setting the smart card mode register (SCSCMR): The SDIR and SINV bits are both set to 0 for
Figure 15.4 shows sample waveforms for register settings of the two types of IC cards (direct
convention and inverse convention) and their start characters.
In the direct convention type, the logical 1 level is state Z, the logical 0 level is state A, and
communication is LSB first. The start character data is H'3B. The parity bit is even (as specified in
the smart card standards), and thus 1.
In the inverse convention type, the logical 1 level is state A, the logical 0 level is state Z, and
communication is MSB first. The start character data is H'3F. The parity bit is even (as specified
in the smart card standards), and thus 0, which corresponds to state Z.
Only data bits D7 to D0 are inverted by the SINV bit. To invert the parity bit, set the O/E bit in
SCSMR to odd parity mode. This applies to both transmission and reception.
for the ordinary SCI. See section 14, Serial Communication Interface (SCI), for more
information. The CKE0 bit specifies the clock output. When no clock is output, set 0; when a
clock is output, set 1.
IC cards that use the direct convention and both to 1 when the inverse convention is used. The
SMIF bit is set to 1 for the smart card interface.
(Z)
(Z)
Ds
Ds
A
A
Figure 15.4 Waveform of Start Character
Z
D0
Z
D7
b. Inverse convention (SDIR, SINV, and O/ are all 1)
a. Direct convention (SDIR, SINV, and O/ are all 0)
Z
D1
Z
D6
A
D2
A
D5
Z
D3
A
D4
Z
D4
A
D3
Z
D5
A
D2
A
D6
A
D1
A
D7
A
D0
Rev. 4.00, 03/04, page 409 of 660
Dp
Dp
Z
Z
(Z)
(Z)
State
State