HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 695

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Notes: 1. Disabled when WCR2 register wait setting is 0.
Pin
CS6 to CS2, CS0
RD
RD/WR
BS
RASU/PTD[1]
RASL/PTD[0]
CASL/PTD[2]
CASU/PTD[3]
WE0/DQMLL
WE1/WE/DQMLU
WE2/ICIORD/DQMUL/
PTC[1]
WE3/ICIOWR/DQMUU/
PTC[2]
CE2A/PTD[6]
CE2B/PTD[7]
CKE
WAIT
IOIS16
A25 to A0
D7 to D0
D15 to D8
D31 to D16
2. Unused data pins should be switched to the port function, or pulled up or down.
R
W
R
W
R
W
R
W
R
W
R
W
8-Bit
Bus
Width
Byte/
Word/
Long-
word
Access
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
High
High
Low
High
High
High
High
High
High
Disabled
Enabled *
Disabled
Address
Valid
data
High-Z*
High-Z*
2
2
PCMCIA Memory Interface
1
Byte
Access
(Ad-
dress
2n)
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
High
High
Low
High
High
High
High
High
High
Disabled Disabled Disabled
Enabled *
Disabled Disabled Disabled
Address
Valid
data
Invalid
data
High-Z*
(Area 6)
16-Bit Bus Width
2
1
Address
Byte
Access
(Ad-
dress
2n + 1)
High
Low
High
High
Low
Enabled
High
High
High
High
High
High
High
Low
High
High
High
High
High
Low
Enabled *
Invalid
data
Valid
data
High-Z*
2
1
Word/
Long-
word
Access
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
High
High
Low
High
High
High
High
High
Low
Enabled *
Address
Valid
data
Valid
data
High-Z*
2
1
8-Bit
Bus
Width
Byte/
Word/
Long-
word
Access
Enabled
High
High
High
Low
Enabled
High
High
High
High
High
High
High
High
Low
High
High
Low
High
High
Disabled
Enabled *
Disabled
Address
Valid
data
High-Z*
High-Z*
Rev. 4.00, 03/04, page 649 of 660
2
2
1
PCMCIA/IO Interface
Byte
Access
(Ad-
dress
2n)
Enabled
High
High
High
Low
Enabled
High
High
High
High
High
High
High
High
Low
High
High
Low
High
High
Disabled Disabled Disabled
Enabled *
Disabled Enabled
Address
Valid
data
Invalid
data
High-Z*
(Area 6)
16-Bit Bus Width
2
1
Byte
Access
(Ad-
dress
2n+1)
High
High
High
High
Low
Enabled
High
High
High
High
High
High
High
High
Low
High
High
Low
High
Low
Enabled *
Address
Invalid
data
Valid
data
High-Z*
2
1
Word/
Long-
word
Access
Enabled
High
High
High
Low
Enabled
High
High
High
High
High
High
High
High
Low
High
High
Low
High
Low
Enabled *
Enabled
Address
Valid
data
Valid
data
High-Z*
2
1