HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 461
HD6417706
Manufacturer Part Number
HD6417706
Description
Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417706.pdf
(709 pages)
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1. Initialize the smart card interface mode as described above in Initialization and in figure 15.5.
2. Check that the ORER and PER flags in SCSSR are cleared to 0. If either flag is set, clear both
3. Repeat steps 2 and 3 until the RDRF flag is set to 1.
4. Read the receive data from SCRDR.
5. To receive more data, clear the RDRF flag to 0 and return to step 2.
6. To end reception, clear the RE bit to 0.
This processing can be interrupted. When the RIE bit is set to 1 and interrupt requests are enabled,
a receive-data-full interrupt (RXI) will be requested when the RDRF flag is set to 1 at the end of
the reception. When an error occurs during reception and either the ORER or PER flag is set to 1,
a communication error interrupt (ERI) will be requested. See Interrupt Operation below for more
information.
The received data will be transferred to SCRDR even when a parity error occurs during reception
and PER is set to 1, so this data can still be read.
to 0 after performing the appropriate error processing procedures.
Figure 15.7 Reception Flowchart (Example)
No
No
Clear RE bit in SCSCR to 0
RDRF flag in SCSSR to 0
ORER = 0 or PER = 0?
Write receive data from
All data received?
SCRDR and clear
Start reception
End reception
RDRF = 1?
Initialize
Start
Yes
Yes
Yes
No
Error processing
Rev. 4.00, 03/04, page 415 of 660
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