ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 14

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ATMEGA8L

Manufacturer Part Number
ATMEGA8L
Description
8-bit AVR with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheets

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Interrupt Response Time
14
ATmega8(L)
When using the SEI instruction to enable interrupts, the instruction following SEI will be
executed before any pending interrupts, as shown in the following example.
The interrupt execution response for all the enabled AVR interrupts is four clock cycles
minimum. After four clock cycles, the Program Vector address for the actual interrupt
handling routine is executed. During this 4-clock cycle period, the Program Counter is
pushed onto the Stack. The Vector is normally a jump to the interrupt routine, and this
jump takes three clock cycles. If an interrupt occurs during execution of a multi-cycle
instruction, this instruction is completed before the interrupt is served. If an interrupt
occurs when the MCU is in sleep mode, the interrupt execution response time is
increased by four clock cycles. This increase comes in addition to the start-up time from
the selected sleep mode.
A return from an interrupt handling routine takes four clock cycles. During these four
clock cycles, the Program Counter (2 bytes) is popped back from the Stack, the Stack
Pointer is incremented by 2, and the I-bit in SREG is set.
Assembly Code Example
C Code Example
sei
sleep; enter sleep, waiting for interrupt
; note: will enter sleep before any pending
; interrupt(s)
_SEI(); /* set global interrupt enable */
_SLEEP(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */
; set global interrupt enable
2486M–AVR–12/03

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