ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 47

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ATMEGA8L

Manufacturer Part Number
ATMEGA8L
Description
8-bit AVR with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheets

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Moving Interrupts Between
Application and Boot Space
General Interrupt Control
Register – GICR
2486M–AVR–12/03
When the BOOTRST Fuse is programmed, the boot section size set to 2K bytes, and
the IVSEL bit in the GICR Register is set before any interrupts are enabled, the most
typical and general program setup for the Reset and Interrupt Vector Addresses is:
The General Interrupt Control Register controls the placement of the Interrupt Vector
table.
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the
Flash memory. When this bit is set (one), the Interrupt Vectors are moved to the begin-
ning of the Boot Loader section of the Flash. The actual address of the start of the boot
Flash section is determined by the BOOTSZ Fuses. Refer to the section “Boot Loader
Support – Read-While-Write Self-Programming” on page 206 for details. To avoid unin-
tentional changes of Interrupt Vector tables, a special write procedure must be followed
to change the IVSEL bit:
1. Write the Interrupt Vector Change Enable (IVCE) bit to one.
2. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
Interrupts will automatically be disabled while this sequence is executed. Interrupts are
disabled in the cycle IVCE is set, and they remain disabled until after the instruction fol-
lowing the write to IVSEL. If IVSEL is not written, interrupts remain disabled for four
cycles. The I-bit in the Status Register is unaffected by the automatic disabling.
Note: If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02
is programmed, interrupts are disabled while executing from the Application section. If
Interrupt Vectors are placed in the Application section and Boot Lock bit BLB12 is pro-
gramed, interrupts are disabled while executing from the Boot Loader section. Refer to
the section “Boot Loader Support – Read-While-Write Self-Programming” on page 206
for details on Boot Lock Bits.
Bit
Read/Write
Initial Value
AddressLabels
;
.org $c00
$c00
$c01
$c02
...
$c12
Handler
$c13
$c14
$c15
$c16
$c17
$c18
RESET: ldi
INT1
R/W
7
0
rjmp
rjmp
rjmp
...
rjmp
out
ldi
out
sei
<instr>
INT0
R/W
Code
6
0
RESET
EXT_INT0
EXT_INT1
... ;
SPM_RDY
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
r16,high(RAMEND); Main program start
R
5
0
R
4
0
Comments
; Reset handler
; IRQ0 Handler
; IRQ1 Handler
; Store Program Memory Ready
; Set Stack Pointer to top of RAM
; Enable interrupts
R
3
0
R
2
0
IVSEL
ATmega8(L)
R/W
1
0
IVCE
R/W
0
0
GICR
47

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