ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 7

no-image

ATMEGA8L

Manufacturer Part Number
ATMEGA8L
Description
8-bit AVR with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheets

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8L-6AU
Manufacturer:
ATMEL
Quantity:
675
Part Number:
ATMEGA8L-8AC
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA8L-8AI
Manufacturer:
MICROCHIP
Quantity:
1 292
Part Number:
ATMEGA8L-8AI
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA8L-8AI
Manufacturer:
ATMEL
Quantity:
8 000
Part Number:
ATMEGA8L-8AI
Manufacturer:
ALTERA
0
Part Number:
ATMEGA8L-8AJ
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA8L-8AU
Manufacturer:
ATMEL
Quantity:
4 590
Part Number:
ATMEGA8L-8AU
Manufacturer:
Atmel
Quantity:
7 500
Part Number:
ATMEGA8L-8AU
Manufacturer:
ATMEL
Quantity:
591
Part Number:
ATMEGA8L-8AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATMEGA8L-8AU
Quantity:
7
Company:
Part Number:
ATMEGA8L-8AU
Quantity:
7
AVR CPU Core
Introduction
Architectural Overview
2486M–AVR–12/03
This section discusses the AVR core architecture in general. The main function of the
CPU core is to ensure correct program execution. The CPU must therefore be able to
access memories, perform calculations, control peripherals, and handle interrupts.
Figure 2. Block Diagram of the AVR MCU Architecture
In order to maximize performance and parallelism, the AVR uses a Harvard architecture
– with separate memories and buses for program and data. Instructions in the Program
memory are executed with a single level pipelining. While one instruction is being exe-
cuted, the next instruction is pre-fetched from the Program memory. This concept
enables instructions to be executed in every clock cycle. The Program memory is In-
System Reprogrammable Flash memory.
The fast-access Register File contains 32 x 8-bit general purpose working registers with
a single clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU)
operation. In a typical ALU operation, two operands are output from the Register File,
the operation is executed, and the result is stored back in the Register File – in one
clock cycle.
Control Lines
Instruction
Instruction
Program
Memory
Register
Decoder
Flash
Program
Counter
and Control
EEPROM
Registrers
I/O Lines
Purpose
General
SRAM
Data Bus 8-bit
Status
32 x 8
Data
ALU
ATmega8(L)
Comparator
i/O Module1
i/O Module 2
i/O Module n
Watchdog
Interrupt
Timer
Analog
Unit
Unit
SPI
7

Related parts for ATMEGA8L