ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 241

• Manufacturer Part Number: ATMEGA8L
• Description: 8-bit AVR with 8K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

SPI Timing
Characteristics
2486M–AVR–12/03
Figure 115. Two-wire Serial Bus Timing
See Figure 116 and Figure 117 for details.
Table 102. SPI Timing Parameters
Note:
SCL
SDA
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
t
SU;STA
5. This requirement applies to all ATmega8 Two-wire Serial Interface operation. Other
6. The actual low period generated by the ATmega8 Two-wire Serial Interface is (1/f
7. The actual low period generated by the ATmega8 Two-wire Serial Interface is (1/f
1. In SPI Programming mode the minimum SCK high/low period is:
SS high to tri-state
devices connected to the Two-wire Serial Bus need only obey the general f
requirement.
- 2/f
strictly met at f
- 2/f
f
speed (400 kHz) with other ATmega8 devices, as well as any other device with a
proper t
SCK to out high
SCK to SS high
- 2t
- 3t
SCK high/low
SS low to SCK
CK
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
Description
SCK period
Out to SCK
SCK period
SCK to out
SCK to out
CLCL
CLCL
= 8 MHz. Still, ATmega8 devices connected to the bus may communicate at full
CK
CK
Setup
Setup
Hold
Hold
), thus the low time requirement will not be strictly met for f
), thus f
LOW
for f
for f
acceptance margin.
CK
CK
t
HD;STA
(1)
SCL
< 12 MHz
> 12 MHz
CK
t
of
t
LOW
must be greater than 6 MHz for the low time requirement to be
= 100 kHz.
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Salve
t
HIGH
t
HD;DAT
t
4 • t
2 • t
2 • t
LOW
Min
10
10
20
ck
ck
ck
t
SU;DAT
50% duty cycle
See Table 50
0.5 • t
Typ
3.6
10
10
10
10
15
15
10
SCK
ATmega8(L)
SCL
t
SU;STO
> 308 kHz when
t
Max
1.6
r
ns
t
BUF
241
SCL
SCL
SCL