ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 73

• Manufacturer Part Number: ATMEGA8L
• Description: 8-bit AVR with 8K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Special Function IO Register –
SFIOR
2486M–AVR–12/03
Each half period of the external clock applied must be longer than one system clock
cycle to ensure correct sampling. The external clock must be guaranteed to have less
than half the system clock frequency (f
the edge detector uses sampling, the maximum frequency of an external clock it can
detect is half the sampling frequency (Nyquist sampling theorem). However, due to vari-
ation of the system clock frequency and duty cycle caused by Oscillator source (crystal,
resonator, and capacitors) tolerances, it is recommended that maximum frequency of an
external clock source is less than f
An external clock source can not be prescaled.
Figure 31. Prescaler for Timer/Counter0 and Timer/Counter1
Note:
• Bit 0 – PSR10: Prescaler Reset Timer/Counter1 and Timer/Counter0
When this bit is written to one, the Timer/Counter1 and Timer/Counter0 prescaler will be
reset. The bit will be cleared by hardware after the operation is performed. Writing a
zero to this bit will have no effect. Note that Timer/Counter1 and Timer/Counter0 share
the same prescaler and a reset of this prescaler will affect both timers. This bit will
always be read as zero.
PSR10
clk
Bit
Read/Write
Initial Value
T0
T1
I/O
Synchronization
Synchronization
1. The synchronization logic on the input pins (
7
–
R
0
R
6
–
0
R
5
–
0
clk_I/O
clk
Clear
T1
ExtClk
/2.5.
R
4
–
0
< f
clk_I/O
ACME
R/W
3
0
T1/T0)
/2) given a 50/50% duty cycle. Since
PUD
R/W
is shown in Figure 30.
2
0
(1)
ATmega8(L)
PSR2
R/W
1
0
clk
PSR10
R/W
T0
0
0
SFIOR
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