ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 166
ATMEGA8L
Manufacturer Part Number
ATMEGA8L
Description
8-bit AVR with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
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Overview of the TWI
Module
SCL and SDA Pins
166
ATmega8(L)
The TWI module is comprised of several submodules, as shown in Figure 76. All regis-
ters drawn in a thick line are accessible through the AVR data bus.
Figure 76. Overview of the TWI Module
These pins interface the AVR TWI with the rest of the MCU system. The output drivers
contain a slew-rate limiter in order to conform to the TWI specification. The input stages
contain a spike suppression unit removing spikes shorter than 50 ns. Note that the inter-
nal pull-ups in the AVR pads can be enabled by setting the PORT bits corresponding to
the SCL and SDA pins, as explained in the I/O Port section. The internal pull-ups can in
some systems eliminate the need for external ones.
Slew-rate
Address Match Unit
Arbitration detection
Control
START / STOP
Address Comparator
Address Register
Control
SCL
(TWAR)
Spike
Filter
Bus Interface Unit
Spike Suppression
Address/Data Shift
Register (TWDR)
Slew-rate
Control
SDA
Status Register
Ack
Spike
Filter
(TWSR)
State Machine and
Control Unit
Status control
Bit Rate Generator
Control Register
Bit Rate Register
Prescaler
(TWCR)
(TWBR)
2486M–AVR–12/03