LM3S2965-IQN25-A0T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IQN25-A0T Datasheet - Page 16

• Manufacturer Part Number: LM3S2965-IQN25-A0T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Table of Contents
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UART ............................................................................................................................................. 291
Register 1:
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SSI ................................................................................................................................................. 331
16
ADC Underflow Status (ADCUSTAT), offset 0x018 ........................................................... 271
ADC Sample Sequencer Priority (ADCSSPRI), offset 0x020 ............................................. 272
ADC Processor Sample Sequence Initiate (ADCPSSI), offset 0x028 ................................. 273
ADC Sample Averaging Control (ADCSAC), offset 0x030 ................................................. 274
ADC Sample Sequence Input Multiplexer Select 0 (ADCSSMUX0), offset 0x040 ............... 275
ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044 ........................................ 277
ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048 ................................ 279
ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068 ................................ 279
ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088 ................................ 279
ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset 0x04C ............................. 280
ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset 0x06C ............................. 280
ADC Sample Sequence FIFO 2 Status (ADCSSFSTAT2), offset 0x08C ............................. 280
ADC Sample Sequence Input Multiplexer Select 1 (ADCSSMUX1), offset 0x060 ............... 281
ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064 ........................................ 282
ADC Sample Sequence Input Multiplexer Select 2 (ADCSSMUX2), offset 0x080 ............... 283
ADC Sample Sequence Control 2 (ADCSSCTL2), offset 0x084 ........................................ 284
ADC Sample Sequence Input Multiplexer Select 3 (ADCSSMUX3), offset 0x0A0 ............... 285
ADC Sample Sequence Control 3 (ADCSSCTL3), offset 0x0A4 ........................................ 286
ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8 ............................... 287
ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset 0x0AC ............................ 288
ADC Test Mode Loopback (ADCTMLB), offset 0x100 ....................................................... 289
UART Data (UARTDR), offset 0x000 ............................................................................... 299
UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 ........................... 301
UART Flag (UARTFR), offset 0x018 ................................................................................ 303
UART IrDA Low-Power Register (UARTILPR), offset 0x020 ............................................. 305
UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ............................................ 306
UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ....................................... 307
UART Line Control (UARTLCRH), offset 0x02C ............................................................... 308
UART Control (UARTCTL), offset 0x030 ......................................................................... 310
UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ........................................... 312
UART Interrupt Mask (UARTIM), offset 0x038 ................................................................. 313
UART Raw Interrupt Status (UARTRIS), offset 0x03C ...................................................... 315
UART Masked Interrupt Status (UARTMIS), offset 0x040 ................................................. 316
UART Interrupt Clear (UARTICR), offset 0x044 ............................................................... 317
UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0 ..................................... 319
UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4 ..................................... 320
UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8 ..................................... 321
UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ..................................... 322
UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0 ...................................... 323
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4 ...................................... 324
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8 ...................................... 325
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ..................................... 326
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0 ........................................ 327
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4 ........................................ 328
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8 ........................................ 329
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ........................................ 330
Preliminary
June 04, 2007