LM3S2965-IQN25-A0T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IQN25-A0T Datasheet - Page 447
LM3S2965-IQN25-A0T
Manufacturer Part Number
LM3S2965-IQN25-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S2965-IQN25-A0T.pdf
(542 pages)
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June 04, 2007
Figure 17-2. Structure of Comparator Unit
+ve input (alternate)
A comparator is configured through two status/control registers (ACCTL and ACSTAT ). The internal
reference is configured through one control register (ACREFCTL). Interrupt status and control is
configured through three registers (ACMIS, ACRIS, and ACINTEN). The operating modes of the
comparators are shown in the Comparator Operating Mode tables.
Typically, the comparator output is used internally to generate controller interrupts. It may also be
used to drive an external pin or generate an analog-to-digital converter (ADC) trigger.
Important:
Table 17-1. Comparator 0 Operating Modes
Table 17-2. Comparator 1 Operating Modes
a. C0o and C1+ signals share a single pin and may only be used as one or the other.
ACCNTL0
ASRCP
00
01
10
11
ACCNTL1
ASRCP
00
01
10
11
reference input
+ve input
Comparator 0
VIN-
Comparator 1
VIN-
C0-
C0-
C0-
C0-
C1-
C1-
C1-
C1-
-ve input
Certain register bit values must be set before using the analog comparators. The proper
pad configuration for the comparator input and output pins are described in the
Comparator Operating Mode tables.
VIN+
reserved
VIN+
C0o/C1+
reserved
C0+
C0+
Vref
C0+
Vref
a
Output
C0o/C1+
C0o/C1+
C0o/C1+
C0o/C1+
0
1
2
Output
n/a
n/a
n/a
n/a
ACCTL
Interrupt
Interrupt
yes
yes
yes
yes
yes
yes
yes
yes
Preliminary
ADC Trigger
ADC Trigger
yes
yes
yes
yes
yes
yes
yes
yes
CINV
ACSTAT
TrigGen
IntGen
LM3S2965 Microcontroller
output
447
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