LM3S2965-IQN25-A0T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IQN25-A0T Datasheet - Page 439

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LM3S2965-IQN25-A0T

Manufacturer Part Number
LM3S2965-IQN25-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
CAN IF1 Data B1 (CANIF1DB1)
CAN0 base: 0x4004.0000
CAN1 base: 0x4004.1000
Offset 0x044
Type R/W, reset 0x0000.0000
June 04, 2007
Reset
Reset
Type
Type
Bit/Field
31:16
15:0
R/W
RO
31
15
0
0
Register 26: CAN IF1 Data B1 (CANIF1DB1), offset 0x044
Register 27: CAN IF2 Data B1 (CANIF2DB1), offset 0x0A4
This register (along with CANIFnDA1, CANIFnDA2, and CANIFnDB2) contains the data to be sent
or that has been received. In a CAN Data Frame, data byte 0 is the first byte to be transmitted or
received and data byte 7 is the last byte to be transmitted or received. In CAN's serial bit stream,
the MSB of each byte is transmitted first.
R/W
RO
30
14
0
0
reserved
Name
Data
R/W
RO
29
13
0
0
R/W
RO
28
12
0
0
R/W
RO
Type
27
11
R/W
0
0
RO
R/W
RO
26
10
0
0
0x0000
Reset
0x00
R/W
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Data Bytes 5 and 4
R/W
RO
24
0
8
0
reserved
Data
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
LM3S2965 Microcontroller
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
439

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