LM3S2965-IQN25-A0T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IQN25-A0T Datasheet - Page 25
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LM3S2965-IQN25-A0T
Manufacturer Part Number
LM3S2965-IQN25-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S2965-IQN25-A0T.pdf
(542 pages)
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- Download datasheet (6Mb)
June 04, 2007
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ARM FiRM-compliant Watchdog Timer
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Controller Area Network (CAN)
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Synchronous Serial Interface (SSI)
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16-bit Input Capture modes
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16-bit PWM mode
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32-bit down counter with a programmable load register
Separate watchdog clock with an enable
Programmable interrupt generation logic with interrupt masking
Lock register protection from runaway software
Reset generation logic with an enable/disable
User-enabled stalling when the controller asserts the CPU Halt flag during debug
Supports CAN protocol version 2.0 part A/B
Bit rates up to 1Mb/s
32 message objects, each with its own identifier mask
Maskable interrupt
Disable automatic retransmission mode for TTCAN
Programmable loop-back mode for self-test operation
Two SSI modules, each with the following features:
Master or slave operation
Programmable clock bit rate and prescale
Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments
synchronous serial interfaces
Programmable data frame size from 4 to 16 bits
Internal loopback test mode for diagnostic/debug testing
ADC event trigger
Input edge count capture
Input edge time capture
Simple PWM mode with software-programmable output inversion of the PWM signal
Preliminary
LM3S2965 Microcontroller
25
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