LM3S2965-IQN25-A0T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IQN25-A0T Datasheet - Page 22
LM3S2965-IQN25-A0T
Manufacturer Part Number
LM3S2965-IQN25-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S2965-IQN25-A0T.pdf
(542 pages)
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22
Notation
reserved
yy:xx
Register Bit/Field
Types
RC
RO
R/W
R/W1C
W1C
WO
Register Bit/Field
Reset Value
0
1
-
Pin/Signal Notation
[ ]
pin
signal
assert a signal
deassert a signal
SIGNAL
SIGNAL
Numbers
X
0x
Meaning
Register bits marked reserved are reserved for future use. In most cases, reserved bits are set to
0; however, user software should not rely on the value of a reserved bit. To provide software
compatibility with future products, the value of a reserved bit should be preserved across a
read-modify-write operation.
The range of register bits inclusive from xx to yy. For example, 31:15 means bits 15 through 31
in that register.
This value in the register bit diagram indicates whether software running on the controller can
change the value of the bit field.
Software can read this field. The bit or field is cleared by hardware after reading the bit/field.
Software can read this field. Always write the chip reset value.
Software can read or write this field.
Software can read or write this field. A write of a 0 to a W1C bit does not affect the bit value in the
register. A write of a 1 clears the value of the bit in the register; the remaining bits remain
unchanged.
This register type is primarily used for clearing interrupt status bits where the read operation
provides the interrupt status and the write of the read value clears only the interrupts being reported
at the time the register was read.
Software can write this field. A write of a 0 to a W1C bit does not affect the bit value in the register.
A write of a 1 clears the value of the bit in the register; the remaining bits remain unchanged. A
read of the register returns no meaningful data.
This register is typically used to clear the corresponding bit in an interrupt register.
Only a write by software is valid; a read of the register returns no meaningful data.
This value in the register bit diagram shows the bit/field value after any reset, unless noted.
Bit cleared to 0 on chip reset.
Bit set to 1 on chip reset.
Nondeterministic.
Pin alternate function; a pin defaults to the signal without the brackets.
Refers to the physical connection on the package.
Refers to the electrical signal encoding of a pin.
Change the value of the signal from the logically False state to the logically True state. For active
High signals, the asserted signal value is 1 (High); for active Low signals, the asserted signal value
is 0 (Low). The active polarity (High or Low) is defined by the signal name (see SIGNAL and
SIGNAL below).
Change the value of the signal from the logically True state to the logically False state.
Signal names are in uppercase and in the Courier font. An overbar on a signal name indicates
that it is active Low. To assert SIGNAL is to drive it Low; to deassert SIGNAL is to drive it High.
Signal names are in uppercase and in the Courier font. An active High signal has no overbar. To
assert SIGNAL is to drive it High; to deassert SIGNAL is to drive it Low.
An uppercase X indicates any of several values is allowed, where X can be any legal pattern. For
example, a binary value of 0X00 can be either 0100 or 0000, a hex value of 0xX is 0x0 or 0x1,
and so on.
Hexadecimal numbers have a prefix of 0x. For example, 0x00FF is the hexadecimal number FF.
Binary numbers are indicated with a b suffix, for example, 1011b. Decimal numbers are written
without a prefix or suffix.
Preliminary
June 04, 2007
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