UPSD3254 STMICROELECTRONICS [STMicroelectronics], UPSD3254 Datasheet - Page 131

• Manufacturer Part Number: UPSD3254
• Description: Flash Programmable System Devices with 8032 Microcontroller Core
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Ports A and B – Functionality and Structure
Ports A and B have similar functionality and struc-
ture, as shown in Figure 65. The two ports can be
configured to perform one or more of the following
functions:
Figure 65. Port A and Port B Structure
MCU I/O Mode
CPLD Output – Macrocells McellAB7-McellAB0
can be connected to Port A or Port B. McellBC7-
McellBC0 can be connected to Port B or Port C.
ALE
ADDRESS
MACROCELL OUTPUTS
ENABLE PRODUCT TERM ( .OE )
WR
WR
WR
CONTROL REG.
CPLD-INPUT
DATA OUT
READ MUX
DIR REG.
D
D
G
D
D
REG.
P
D
B
Q
Q
Q
Q
UPSD3254A, UPSD3254BV, UPSD3253B, UPSD3253BV
ADDRESS
A [ 7:0 ]
DATA OUT
DATA IN
CPLD Input – Via the Input Macrocells (IMC).
Latched Address output – Provide latched
address output as per Table 93.
Open Drain/Slew Rate – pins PA3-PA0 and
PB3-PB0 can be configured to fast slew rate,
pins PA7-PA4 and PB7-PB4 can be configured
to Open Drain Mode.
Peripheral Mode – Port A only (80-pin package)
OUTPUT
SELECT
OUTPUT
MUX
ENABLE OUT
MACROCELL
INPUT
A OR B PIN
PORT
AI06605
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