UPSD3254 STMICROELECTRONICS [STMicroelectronics], UPSD3254 Datasheet - Page 132

• Manufacturer Part Number: UPSD3254
• Description: Flash Programmable System Devices with 8032 Microcontroller Core
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

UPSD3254A, UPSD3254BV, UPSD3253B, UPSD3253BV
Port C – Functionality and Structure
Port C can be configured to perform one or more
of the following functions (see Figure 66):
Figure 66. Port C Structure
Note: 1. ISP or battery back-up
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MCU I/O Mode
CPLD Output – McellBC7-McellBC0 outputs
can be connected to Port B or Port C.
CPLD Input – via the Input Macrocells (IMC)
In-System Programming (ISP) – JTAG pins
(TMS, TCK, TDI, TDO) are dedicated pins for
device programming. (See the section entitled
“PROGRAMMING IN-CIRCUIT USING THE
WR
MCELLBC [ 7:0 ]
WR
ENABLE PRODUCT TERM ( .OE )
CPLD - INPUT
READ MUX
DATA OUT
DIR REG.
D
D
REG.
P
D
B
Q
Q
DATA IN
SPECIAL FUNCTION
DATA OUT
Port C does not support Address Out Mode, and
therefore no Control Register is required.
JTAG SERIAL INTERFACE,” page 141, for
more information on JTAG programming.)
Open Drain – Port C pins can be configured in
Open Drain Mode
Battery Backup features – PC2 can be
configured for a battery input supply, Voltage
Stand-by (V
PC4 can be configured as a Battery-on Indicator
(V
V
1
BAT
BATON
SPECIAL FUNCTION
.
OUTPUT
OUTPUT
SELECT
MUX
), indicating when V
ENABLE OUT
STBY
MACROCELL
).
1
INPUT
CONFIGURATION
CC
PORT C PIN
BIT
is less than
AI06618