TE28F008xxx Intel Corporation, TE28F008xxx Datasheet - Page 20
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TE28F008xxx
Manufacturer Part Number
TE28F008xxx
Description
(TE28F Series) 3 Volt Advanced Boot Block Flash Memory
Manufacturer
Intel Corporation
Datasheet
1.TE28F008XXX.pdf
(58 pages)
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
3.3
3.3.1
14
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
SR.6 = ERASE-SUSPEND STATUS (ESS)
SR.5 = ERASE STATUS (ES)
SR.4 = PROGRAM STATUS (PS)
SR.3 = V
SR.2 = PROGRAM SUSPEND STATUS (PSS)
SR.1 = BLOCK LOCK STATUS
SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R)
WSMS
1 = Ready
0 = Busy
1 = Erase Suspended
0 = Erase In Progress/Completed
1 = Error In Block Erasure
0 = Successful Block Erase
1 = Error in Word Program
0 = Successful Word Program
1 = V
0 = V
1 = Program Suspended
0 = Program in Progress/Completed
1 = Program/Erase attempted on locked block;
0 = No operation to locked blocks
Table 7.
7
Operation aborted
PP
PP
PP
OK
Low Detect, Operation Abort
STATUS (VPPS)
Status Register Bit Definition
NOTE: A Command Sequence Error is indicated when both SR.4, SR.5 and SR.7 are set.
Block Locking
The 3 Volt Advanced Boot Block flash memory architecture features two hardware-lockable
parameter blocks.
WP# = V
The lockable blocks are locked when WP# = V
will result in an error, which will be reflected in the status register. For top configuration, the top
two parameter blocks (blocks #133 and #134 for the 64 Mbit, #69 and #70 for the 32 Mbit, blocks
#37 and #38 for the 16 Mbit, blocks #21 and #22 for the 8 Mbit, blocks #13 and #14 for the 4 Mbit)
are lockable. For the bottom configuration, the bottom two parameter blocks (blocks #0 and #1 for
4 /8 /16 /32/64 Mbit) are lockable. Unlocked blocks can be programmed or erased normally (unless
V
PP
ESS
is below V
6
IL
for Block Locking
PPLK
ES
5
).
PS
4
Check Write State Machine bit first to determine word program
or block erase completion, before checking program or erase
status bits.
When erase suspend is issued, WSM halts execution and sets
both WSMS and ESS bits to “1.” ESS bit remains set at “1” until
an Erase Resume command is issued.
When this bit is set to “1,” WSM has applied the max. number
of erase pulses to the block and is still unable to verify
successful block erasure.
When this bit is set to “1,” WSM has attempted but failed to
program a word.
The V
V
Program or Erase command sequences have been entered,
and informs the system if V
V
WSM. The V
feedback between V
max and V
When program suspend is issued, WSM halts execution and
sets both WSMS and PSS bits to “1.” PSS bit remains set to “1”
until a Program Resume command is issued.
If a program or erase operation is attempted to one of the
locked blocks, this bit is set by the WSM. The operation
specified is aborted and the device is returned to read status
mode.
when polling the status register.
This bit is reserved for future use and should be masked out
PP
PP
VPPS
level. The WSM interrogates V
is also checked before the operation is verified by the
IL
PP
3
; any program or erase operation to a locked block
status bit does not provide continuous indication of
PP4
PP
min.
status bit is not guaranteed to report accurate
PPLK
PSS
2
max and V
NOTES:
PP
has not been switched on. The
PP
PP1
BLS
level only after the
1
min or between V
3UHOLPLQDU\
R
0
PP1