USB97C201-MN SMSC [SMSC Corporation], USB97C201-MN Datasheet - Page 25
USB97C201-MN
Manufacturer Part Number
USB97C201-MN
Description
USB 2.0 ATA/ ATAPI Controller
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.USB97C201-MN.pdf
(59 pages)
- Current page: 25 of 59
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SMSC DS – USB97C201
BIT
7
6
5
4
3
2
1
0
(0x9C- RESET=0xFF)
GPIO7_MSK
GPIO6_MSK
GPIO5_MSK
GPIO4_MSK
GPIO3_MSK
GPIO2_MSK
GPIO1_MSK
GPIO0_MSK
GPIO_MSK
NAME
Table 16 – GPIO Interrupt Mask Register
PRELIMINARY
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1 = Prevents a high in the corresponding bit
in the GPIO_IRQ register from generating an
interrupt on the INT4 input to the 8051.
1 = Prevents a high in the corresponding bit
in the GPIO_IRQ register from generating an
interrupt on the INT4 input to the 8051..
1 = Prevents a high in the corresponding bit
in the GPIO_IRQ register from generating an
interrupt on the INT4 input to the 8051...
1 = Prevents a high in the corresponding bit
in the GPIO_IRQ register from generating an
interrupt on the INT4 input to the 8051...
1 = Prevents a high in the corresponding bit
in the GPIO_IRQ register from generating an
interrupt on the INT4 input to the 8051...
1 = Prevents a high in the corresponding bit
in the GPIO_IRQ register from generating an
interrupt on the INT4 input to the 8051...
1 = Prevents a high in the corresponding bit
in the GPIO_IRQ register from generating an
interrupt on the INT4 input to the 8051...
1 = Prevents a high in the corresponding bit
in the GPIO_IRQ register from generating an
interrupt on the INT4 input to the 8051...
Page 25
GPIO INTERRUPT MASK REGISTER
DESCRIPTION
Rev. 03/25/2002
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