HI-6120 HOLTIC [Holt Integrated Circuits], HI-6120 Datasheet - Page 53
HI-6120
Manufacturer Part Number
HI-6120
Description
MIL-STD-1553 Remote Terminal ICs
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
1.HI-6120.pdf
(157 pages)
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After MR reset or SRST software reset, the device auto-
matically initializes bits 7:0 in the Interrupt Log Address
register to the buffer’s base address, 0x0040. The bit
7:0 value read will always be even, ranging from 0x0040
to 0x005E. Once terminal operation begins, the current
value of the Interrupt Log Address indicates where the
Interrupt Information Word (IIW) for the next occurring
interrupt will be stored.
On the first interrupt occurring after reset, the device
writes the IIW and IAW to offset locations 00000 and
00001 respectively. The device increments the ring
buffer pointer after each word is stored, storing interrupt
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
53
information sequentially in the ring buffer. Information
words for the sixteenth interrupt are stored in offset
locations 0x1E and 0x1F (buffer addresses 0x005E and
0x005F) and the Interrupt Log Address “rolls over” to
again point to offset location 0 (buffer address 0x0040)
where the Interrupt Information Word for the seventeenth
interrupt will be stored.
Bits 15:8 in the Interrupt Log Address register maintain a
count of interrupt events since the register was last read.
The interrupt count stops at 255 decimal. Counts greater
than 16 indicate buffer overrun, but the extended count
capacity is provided as a diagnostic aid.
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