E28F320J5100 Intel, E28F320J5100 Datasheet - Page 19

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E28F320J5100

Manufacturer Part Number
E28F320J5100
Description
Manufacturer
Intel
Datasheet
NOTE:
1.
x16 device/
x16 mode
x16 device/
x8 mode
PRELIMINARY
The system must drive the lowest order addresses to access all the device’s array data when the device is configured in x8
mode. Therefore, word addressing where these lower addresses not toggled by the system is “Not Applicable” for x8-
configured devices.
Address
Device
Device
A
0010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
0018h
mode
type/
16
...
–A
1
Table 5. Summary of Query Structure Output as a Function of Device and Mode
Table 6. Example of Query Structure Output of a x16- and x8-Capable Device
Query start
location
in maximum
device
bus width
addresses
0051h
0052h
0059h
P_ID
P_ID
P
P
A_ID
A_ID
N/A
LO
HI
10h
...
Word Addressing:
(1)
LO
HI
LO
HI
Query Data
INTEL
D
15
“Q”
“R”
“Y”
PrVendor
PrVendor
AltVendor
–D
ID #
TblAdr
ID #
Query data with
maximum device
bus width addressing
“x” = ASCII equivalent
10h: 0051h
11h: 0052h
12h: 0059h
N/A
0
®
StrataFlash™ MEMORY TECHNOLOGY, 32 AND 64 MBIT
(1)
“Q”
“R”
“Y”
Address
A
Byte
20h
21h
22h
23h
24h
25h
26h
27h
28h
7
...
–A
0
Query
start
address
in bytes
20h
20h
51h
51h
52h
52h
59h
59h
P_ID
P_ID
P_ID
20h:
21h:
22h:
20h:
21h:
22h:
Byte Addressing:
...
byte addressing
Query data with
LO
LO
HI
Query Data
D
51h
00h
52h
51h
51h
52h
7
–D
“Q”
“Q”
“R”
“R”
“Y”
“Y
PrVendor
0
ID #
“Q”
null
“R”
“Q”
“Q”
“R”
19

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