S25FL512SAGMFIG13 Spansion, S25FL512SAGMFIG13 Datasheet - Page 112

• Manufacturer Part Number: S25FL512SAGMFIG13
• Description: Flash 512Mb 3V 133MHz Serial NOR Flash
• Manufacturer: Spansion

Specifications of S25FL512SAGMFIG13

• Rohs: yes
• Memory Type: Flash
• Memory Size: 512 MB
• Architecture: Uniform
• Timing Type: Asynchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-16

10.8
112
10.7.2
10.8.1
10.8.2
Advanced Sector Protection Commands
OTP Read (OTPR 4Bh):
ASP Read (ASPRD 2Bh)
ASP Program (ASPP 2Fh)
The OTP Read command reads data from the OTP region. The OTP region is 1024 bytes so, the address bits
from A23 to A10 must be zero for this command. Refer to
OTP region. The protocol of the OTP Read command is similar to the Fast Read command except that it will
not wrap to the starting address after the OTP address is at its maximum; instead, the data beyond the
maximum OTP address will be undefined. Also, the OTP Read command is not affected by the latency code.
The OTP read command always has one dummy byte of latency as shown below.
The ASP Read instruction 2Bh is shifted into SI by the rising edge of the SCK signal. Then the 16-bit ASP
register contents is shifted out on the serial output SO, least significant byte first. Each bit is shifted out at the
SCK frequency by the falling edge of the SCK signal. It is possible to read the ASP register continuously by
providing multiples of 16 clock cycles. The maximum operating clock frequency for the ASP Read (ASPRD)
command is 133 MHz.
Before the ASP Program (ASPP) command can be accepted by the device, a Write Enable (WREN)
command must be issued. After the Write Enable (WREN) command has been decoded, the device will set
the Write Enable Latch (WEL) in the Status Register to enable any write operations.
The ASPP command is entered by driving CS# to the logic low state, followed by the instruction and two data
bytes on SI, least significant byte first. The ASP Register is two data bytes in length.
Phase
Phase
Phase
SCK
CS#
SCK
CS#
SCK
SO
CS#
SO
SI
S O
SI
S I
7
7 6 5 4 3 2 1 0 23
7
Figure 10.60 Read OTP (OTPR 4Bh) Command Sequence
6
Instruction
6
Instruction
5
4 3
5
Figure 10.59 Page Program (OTPP 42h) Command Sequence
Instruction
4
2
Figure 10.61 ASPRD Command
3
D a t a
1 0 23
2
1
Address
S25FL512S
0
5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
Address
S h e e t
7
1 0
6
Register Read
5
( P r e l i m i n a r y )
Dummy Cycles
4
OTP Address Space on page 54
3
Input Data 1
2
1
0
7
Repeat Register Read
S25FL512S_00_04 June 13, 2012
7 6
6
5
5
4
Input Data 2
Data 1
4 3
3
for details on the
2
2 1 0
1
0