PCAL6416APW,118 NXP Semiconductors, PCAL6416APW,118 Datasheet - Page 11
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PCAL6416APW,118
Manufacturer Part Number
PCAL6416APW,118
Description
Interface - I/O Expanders 16b I2C BUS INTERUPT
Manufacturer
NXP Semiconductors
Datasheet
1.PCAL6416AHF128.pdf
(54 pages)
Specifications of PCAL6416APW,118
Rohs
yes
Maximum Operating Frequency
100 kHz
Operating Supply Voltage
1.65 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-24
Operating Current
200 mA
Output Current
25 mA
Product Type
I/O Expanders
Factory Pack Quantity
2500
NXP Semiconductors
PCAL6416A
Product data sheet
7.4.1 Input port register pair (00h, 01h)
7.4.2 Output port register pair (02h, 03h)
7.4 Register descriptions
The Input port registers (registers 0 and 1) reflect the incoming logic levels of the pins,
regardless of whether the pin is defined as an input or an output by the Configuration
register. The Input port registers are read only; writes to these registers have no effect.
The default value ‘X’ is determined by the externally applied logic level. An Input port
register read operation is performed as described in
Table 7.
Table 8.
The Output port registers (registers 2 and 3) shows the outgoing logic levels of the pins
defined as outputs by the Configuration register. Bit values in these registers have no
effect on pins defined as inputs. In turn, reads from these registers reflect the value that
was written to these registers, not the actual pin value. A register pair write operation is
described in
Table 9.
Table 10.
Bit
Symbol
Default
Bit
Symbol
Default
Bit
Symbol
Default
Bit
Symbol
Default
Input port 0 register (address 00h)
Input port 1 register (address 01h)
Output port 0 register (address 02h)
Output port 1 register (address 03h)
O0.7
O1.7
Section
I0.7
I1.7
X
X
7
7
7
1
7
1
All information provided in this document is subject to legal disclaimers.
8.1. A register pair read operation is described in
Rev. 3 — 24 December 2012
O0.6
O1.6
I0.6
I1.6
X
X
6
6
6
1
6
1
Low-voltage translating 16-bit I
O0.5
O1.5
I0.5
I1.5
X
X
5
5
5
1
5
1
O0.4
O1.4
I0.4
I1.4
X
X
4
4
4
1
4
1
O0.3
O1.3
Section
I0.3
I1.3
X
X
3
3
3
1
3
1
2
C-bus/SMBus I/O expander
8.2.
O0.2
O1.2
I0.2
I1.2
X
X
PCAL6416A
2
2
2
1
2
1
Section
© NXP B.V. 2012. All rights reserved.
O0.1
O1.1
I0.1
I1.1
X
X
1
1
1
1
1
1
8.2.
O0.0
O1.0
I0.0
I1.0
11 of 54
X
X
0
0
0
1
0
1