PCAL6416APW,118 NXP Semiconductors, PCAL6416APW,118 Datasheet - Page 28

• Manufacturer Part Number: PCAL6416APW,118
• Description: Interface - I/O Expanders 16b I2C BUS INTERUPT
• Manufacturer: NXP Semiconductors

Specifications of PCAL6416APW,118

• Rohs: yes
• Maximum Operating Frequency: 100 kHz
• Operating Supply Voltage: 1.65 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-24
• Operating Current: 200 mA
• Output Current: 25 mA
• Product Type: I/O Expanders
• Factory Pack Quantity: 2500

NXP Semiconductors
PCAL6416A
Product data sheet
9.4 Device current consumption with internal pull-up and pull-down
9.5 I
resistors
The PCAL6416A integrates programmable pull-up and pull-down resistors to eliminate
external components when pins are configured as inputs and pull-up or pull-down
resistors are required (for example, nothing is driving the inputs to the power supply rails.
Since these pull-up and pull-down resistors are internal to the device itself, they contribute
to the current consumption of the device and must be considered in the overall system
design.
The pull-up or pull-down function is selected in registers 48h and 49h, while the resistor is
connected by the enable registers 46h and 47h. The configuration of the resistors is
shown in
If the resistor is configured as a pull-up, that is, connected to V
the V
appear as additional I
In the same manner, if the resistor is configured as a pull-down and the pin is held HIGH,
current will flow from the power supply through the pin to the V
will not be measured as part of I
through V
The pull-up and pull-down resistors are simple resistors and the current is linear with
voltage. The resistance specification for these devices spans from 50 k with a nominal
100 k value. Any current flow through these resistors is additive by the number of pins
held HIGH or LOW and the current can be calculated by Ohm’s law. See
graph of supply current versus the number of pull-up resistors.
There are a number of techniques to recover from error conditions on the I
devices like the PCAL6416A use a state machine to implement the I
expect a certain sequence of events to occur to function properly. Unexpected events at
the I
usually possible to recover deterministically to a known bus state with careful protocol
manipulation.
A hard slave reset, either through power-on reset or by activating the RESET pin, will set
the device back into the default state. Of course, this means the input/output pins and
their configuration will be lost, which might cause some system issues.
A STOP condition, which is only initiated by the master, will reset the slave state machine
into a known condition where SDA is not driven LOW by the slave and logically, the slave
is waiting for a START condition. A STOP condition is defined as SDA transitioning from
LOW to HIGH while SCL is HIGH.
If the master is interrupted during a packet transmission, the slave may be sending data or
performing an Acknowledge, driving the I
effectively blocks any other I
situation, once the master recognizes a ‘stuck bus’ state, is for the master to blindly
transmit nine clocks on SCL. If the slave was transmitting data or acknowledging, nine or
2
C-bus error recovery techniques
2
DD(P)
C master can wreak havoc with the slaves connected on the bus. However, it is
Figure
SS
pin through the resistor to ground when the pin is held LOW. This current will
.
All information provided in this document is subject to legal disclaimers.
10.
Rev. 3 — 24 December 2012
DD
upsetting any current consumption measurements.
Low-voltage translating 16-bit I
2
C-bus transaction. A deterministic method to clear this
DD
, one must be mindful of the 200 mA limiting value
2
C-bus SDA line LOW. Since SDA is LOW, it
2
C-bus/SMBus I/O expander
DD
SS
PCAL6416A
, a current will flow from
pin. While this current
2
C protocol and
© NXP B.V. 2012. All rights reserved.
Figure 28
2
C-bus. Slave
28 of 54
for a