C8051F709-GQR Silicon Labs, C8051F709-GQR Datasheet - Page 175

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C8051F709-GQR

Manufacturer Part Number
C8051F709-GQR
Description
8-bit Microcontrollers - MCU 8kB 32B EEPROM Cap Sense
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F709-GQR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F709-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F70x/71x
27.3. External Oscillator Drive Circuit
The external oscillator circuit may drive an external crystal, ceramic resonator, capacitor, or RC network. A
CMOS clock may also provide a clock input. For a crystal or ceramic resonator configuration, the crys-
tal/resonator must be wired across the XTAL1 and XTAL2 pins as shown in Option 1 of Figure 27.1. A
10 Mresistor also must be wired across the XTAL2 and XTAL1 pins for the crystal/resonator configura-
tion. In RC, capacitor, or CMOS clock configuration, the clock source should be wired to the XTAL2 pin as
shown in Option 2, 3, or 4 of Figure 27.1. The type of external oscillator must be selected in the OSCXCN
register, and the frequency control bits (XFCN) must be selected appropriately (see SFR Definition 27.4).
Important Note on External Oscillator Usage: Port pins must be configured when using the external
oscillator circuit. When the external oscillator drive circuit is enabled in crystal/resonator mode, Port pins
P0.2 and P0.3 are used as XTAL1 and XTAL2 respectively. When the external oscillator drive circuit is
enabled in capacitor, RC, or CMOS clock mode, Port pin P0.3 is used as XTAL2. The Port I/O Crossbar
should be configured to skip the Port pins used by the oscillator circuit; see Section “28.3. Priority Crossbar
Decoder” on page 185 for Crossbar configuration. Additionally, when using the external oscillator circuit in
crystal/resonator, capacitor, or RC mode, the associated Port pins should be configured as analog inputs.
In CMOS clock mode, the associated pin should be configured as a digital input. See Section “28.4. Port
I/O Initialization” on page 189 for details on Port input mode selection.
Rev. 1.0
175

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