C8051F709-GQR Silicon Labs, C8051F709-GQR Datasheet - Page 275

• Manufacturer Part Number: C8051F709-GQR
• Description: 8-bit Microcontrollers - MCU 8kB 32B EEPROM Cap Sense
• Manufacturer: Silicon Labs

Specifications of C8051F709-GQR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

SFR Definition 33.8. TMR2CN: Timer 2 Control
SFR Address = 0xC8; SFR Page = All Pages; Bit-Addressable
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
TF2CEN
T2SPLIT
T2XCLK
TF2LEN
Unused
Name
TF2H
TF2L
TR2
TF2H
R/W
7
0
Timer 2 High Byte Overflow Flag.
Set by hardware when the Timer 2 high byte overflows from 0xFF to 0x00. In 16 bit
mode, this will occur when Timer 2 overflows from 0xFFFF to 0x0000. When the
Timer 2 interrupt is enabled, setting this bit causes the CPU to vector to the Timer 2
interrupt service routine. This bit is not automatically cleared by hardware.
Timer 2 Low Byte Overflow Flag.
Set by hardware when the Timer 2 low byte overflows from 0xFF to 0x00. TF2L will
be set when the low byte overflows regardless of the Timer 2 mode. This bit is not
automatically cleared by hardware.
Timer 2 Low Byte Interrupt Enable.
When set to 1, this bit enables Timer 2 Low Byte interrupts. If Timer 2 interrupts are
also enabled, an interrupt will be generated when the low byte of Timer 2 overflows.
Timer 2 Comparator Capture Enable.
When set to 1, this bit enables Timer 2 Comparator Capture Mode. If TF2CEN is set,
on a rising edge of the Comparator0 output the current 16-bit timer value in
TMR2H:TMR2L will be copied to TMR2RLH:TMR2RLL. If Timer 2 interrupts are also
enabled, an interrupt will be generated on this event.
Timer 2 Split Mode Enable.
When this bit is set, Timer 2 operates as two 8-bit timers with auto-reload.
0: Timer 2 operates in 16-bit auto-reload mode.
1: Timer 2 operates as two 8-bit auto-reload timers.
Timer 2 Run Control.
Timer 2 is enabled by setting this bit to 1. In 8-bit mode, this bit enables/disables
TMR2H only; TMR2L is always enabled in split mode.
Read = 0b; Write = Don’t Care.
Timer 2 External Clock Select.
This bit selects the external clock source for Timer 2. If Timer 2 is in 8-bit mode, this
bit selects the external oscillator clock source for both timer bytes. However, the
Timer 2 Clock Select bits (T2MH and T2ML in register CKCON) may still be used to
select between the external clock and the system clock for either timer.
0: Timer 2 clock is the system clock divided by 12.
1: Timer 2 clock is the external clock divided by 8 (synchronized with SYSCLK).
TF2L
R/W
6
0
TF2LEN
R/W
5
0
TF2CEN
R/W
Rev. 1.0
4
0
Function
T2SPLIT
R/W
3
0
TR2
R/W
C8051F70x/71x
2
0
R
1
0
T2XCLK
R/W
0
0
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