C8051F709-GQR Silicon Labs, C8051F709-GQR Datasheet - Page 80
C8051F709-GQR
Manufacturer Part Number
C8051F709-GQR
Description
8-bit Microcontrollers - MCU 8kB 32B EEPROM Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F709-GQR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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C8051F70x/71x
15. Capacitive Sense (CS0)
The Capacitive Sense subsystem uses a capacitance-to-digital circuit to determine the capacitance on a
port pin. The module can take measurements from different port pins using the module’s analog multi-
plexer. The module is enabled only when the CS0EN bit (CS0CN) is set to 1. Otherwise the module is in a
low-power shutdown state. The module can be configured to take measurements on one port pin or a
group of port pins, using auto-scan. A selectable gain circuit allows the designer to adjust the maximum
allowable capacitance. An accumulator is also included, which can be configured to average multiple con-
versions on an input channel. Interrupts can be generated when CS0 completes a conversion or when the
measured value crosses a threshold defined in CS0THH:L.
80
. . .
CS0SS
Auto-Scan
CS0MX
CS0MD1
Logic
CS0SE
1x-8x
Port I/O and
Peripherals
Pin Monitor
CS0PM
CS0MD2
Digital Converter
Capacitance to
Figure 15.1. CS0 Block Diagram
Rev. 1.0
CS0CN
12, 13, 14, or 16 bits
Conversion
Start
22-Bit Accumulator
Compare Logic
Greater Than
CS0THH:L
CS0DH:L
000
001
010
011
100
101
110
111
Timer 3 Overflow
Initiated continuously
CS0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
Reserved
Initiated continuously
when auto-scan
enabled
CS0CF
CS0CMPF
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