C8051F709-GQR Silicon Labs, C8051F709-GQR Datasheet - Page 57

• Manufacturer Part Number: C8051F709-GQR
• Description: 8-bit Microcontrollers - MCU 8kB 32B EEPROM Cap Sense
• Manufacturer: Silicon Labs

Specifications of C8051F709-GQR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

10.3.2. Tracking Modes
The AD0TM bit in register ADC0CN enables "delayed conversions", and will delay the actual conversion
start by three SAR clock cycles, during which time the ADC will continue to track the input. If AD0TM is left
at logic 0, a conversion will begin immediately, without the extra tracking time. For internal start-of-conver-
sion sources, the ADC will track anytime it is not performing a conversion. When the CNVSTR signal is
used to initiate conversions, ADC0 will track either when AD0TM is logic 1, or when AD0TM is logic 0 and
CNVSTR is held low. See Figure 10.2 for track and convert timing details. Delayed conversion mode is
useful when AMUX settings are frequently changed, due to the settling time requirements described in
Section “10.3.3. Settling Time Requirements” on page 58.
Timer 0, Timer 2, Timer 1 Overflow
(AD0CM[2:0]=000, 001, 010, 011)
Write '1' to AD0BUSY,
Figure 10.2. 10-Bit ADC Track and Conversion Example Timing
(AD0CM[2:0]=1xx)
SAR Clocks
AD0TM=1
AD0TM=0
AD0TM=1
AD0TM=0
CNVSTR
Clocks
Clocks
Clocks
SAR
SAR
SAR
N/C
Track or
Convert
A. ADC Timing for External Trigger Source
B. ADC Timing for Internal Trigger Source
Track
Track
Track
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15* 16 17
1 2 3 4 5 6 7 8 9 10 11 12* 13 14
Rev. 1.0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15* 16 17
1 2 3 4 5 6 7 8 9 10 11 12* 13 14
Convert
Convert
*Conversion Ends at rising edge of 15
*Conversion Ends at rising edge of 12
*Conversion Ends at rising edge of 15
*Conversion Ends at rising edge of 12
Convert
Convert
C8051F70x/71x
th
th
th
clock in 8-bit Mode
th
clock in 8-bit Mode
clock in 8-bit Mode
Track
clock in 8-bit Mode
N/C
Track
Track
57