C8051F709-GQR Silicon Labs, C8051F709-GQR Datasheet - Page 185

• Manufacturer Part Number: C8051F709-GQR
• Description: 8-bit Microcontrollers - MCU 8kB 32B EEPROM Cap Sense
• Manufacturer: Silicon Labs

Specifications of C8051F709-GQR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F70x/71x
28.3. Priority Crossbar Decoder
The Priority Crossbar Decoder assigns a priority to each I/O function, starting at the top with UART0. When
a digital resource is selected, the least-significant unassigned Port pin is assigned to that resource (exclud-
ing UART0, which is always at pins 4 and 5). If a Port pin is assigned, the Crossbar skips that pin when
assigning the next selected resource. The potential crossbar pin assignments are shown in Figure 28.4.
Additionally, the Crossbar will skip Port pins whose associated bits in the PnSKIP registers are set. The
PnSKIP registers allow software to skip Port pins that are to be used for analog input, dedicated functions,
or GPIO. The Crossbar skips selected pins as if they were already assigned, and moves to the next unas-
signed pin. Figure 28.5 shows an example crossbar configuration with no pins skipped. Figure 28.6 shows
the same example with pins P0.2, P0.3 and P1.0 skipped.
If a Port pin is claimed by a peripheral without use of the Crossbar, its corresponding PnSKIP bit should be
set. This applies to P0.0 if VREF is used, P0.1 if AGND is used, P0.3 and/or P0.2 if the external oscillator
circuit is enabled, P0.6 if the ADC is configured to use the external conversion start signal (CNVSTR), and
any selected ADC or Comparator inputs. It is also important to skip any pins that do not exist for the pack-
age being used.
Registers XBR0 and XBR1 are used to assign the digital I/O resources to the physical I/O Port pins. When
the SMBus is selected, the Crossbar assigns both pins associated with the SMBus (SDA and SCL); when
the UART is selected, the Crossbar assigns both pins associated with the UART (TX and RX). UART0 pin
assignments are fixed for bootloading purposes: UART TX0 is always assigned to P0.4; UART RX0 is
always assigned to P0.5. Standard Port I/Os appear contiguously after the prioritized functions have been
assigned.
Important Note: The SPI can be operated in either 3-wire or 4-wire modes, pending the state of the
NSSMD1–NSSMD0 bits in register SPI0CN. According to the SPI mode, the NSS signal may or may not
be routed to a Port pin.
Rev. 1.0
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