FDPC8012S Fairchild Semiconductor, FDPC8012S Datasheet - Page 8

• Manufacturer Part Number: FDPC8012S
• Description: MOSFET 25V Asymmetric Dual N-Channel Pwr Trench
• Manufacturer: Fairchild Semiconductor

Specifications of FDPC8012S

• Rohs: yes
• Transistor Polarity: N-Channel
• Drain-source Breakdown Voltage: 25 V
• Gate-source Breakdown Voltage: 12 V
• Continuous Drain Current: 88 A
• Resistance Drain-source Rds (on): 7.5 Ohms
• Configuration: Dual Asymmetric
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Package / Case: PowerClip 33
• Fall Time: 3 ns
• Forward Transconductance Gfs (max / Min): 200 S
• Gate Charge Qg: 25 nC
• Minimum Operating Temperature: - 55 C
• Power Dissipation: 2 W
• Rise Time: 3 ns
• Typical Turn-off Delay Time: 34 ns

FDPC8012S Rev.C
©2012 Fairchild Semiconductor Corporation
Typical Characteristics (Q2 N-Channel)
300
100
0.01
200
100
10
0.1
10
10
0.001
1
8
6
4
2
0
1
0.01
Figure 20. Gate Charge Characteristics
0
I
THIS AREA IS
LIMITED BY r
SINGLE PULSE
T
R
T
D
Figure 22. Unclamped Inductive
J
A
θ
= 26 A
JA
= MAX RATED
Figure 24. Forward Bias Safe
= 25
= 135
0.01
o
V
12
C
DS
Switching Capability
t
o
AV
0.1
C/W
, DRAIN to SOURCE VOLTAGE (V)
T
, TIME IN AVALANCHE (ms)
DS(on)
Operating Area
Q
J
g
= 125
, GATE CHARGE (nC)
V
0.1
DD
24
DERIVED FROM
TEST DATA
o
= 13 V
C
1
T
V
V
J
DD
DD
= 100
36
1
= 10 V
= 15 V
T
o
J
C
= 25
10
10
o
48
C
100 ms
100
1 ms
10 ms
1 s
10 s
DC
μ
100
s
100
60
8
T
J
= 25°C unless otherwise noted
10000
10000
1000
1000
Figure 23. Maximum Continuous Drain
120
100
100
0.1
Figure 25. Single Pulse Maximum Power
96
72
48
24
10
10
1
0
10
0.1
25
-4
Figure 21. Capacitance vs Drain
Limited by Package
R
Current vs Case Temperature
f = 1 MHz
V
θ
SINGLE PULSE
R
T
JC
GS
A
θ
10
JA
= 25
= 3.5
= 0 V
-3
V
= 135
DS
50
to Source Voltage
o
C
, DRAIN TO SOURCE VOLTAGE (V)
o
T
C/W
10
C
o
C/W
,
t, PULSE WIDTH (sec)
Dissipation
-2
CASE TEMPERATURE
75
10
1
-1
10
V
GS
100
0
= 4.5 V
10
www.fairchildsemi.com
(
o
C
1
)
125
V
10
GS
100
C
C
C
= 10 V
iss
oss
rss
1000
150
25