TDGL007 Microchip Technology, TDGL007 Datasheet - Page 147

• Manufacturer Part Number: TDGL007
• Description: Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
• Manufacturer: Microchip Technology

Specifications of TDGL007

• Product: Development Boards
• Interface Type: CAN, I2C
• Operating Supply Voltage: 5 V

For example, suppose a 10 MHz crystal is being used
with “XT with PLL” as the selected oscillator mode. If
PLLPRE<4:0> = 0, then N1 = 2. This yields a VCO input
of 10/2 = 5 MHz, which is within the acceptable range of
0.8-8 MHz. If PLLDIV<8:0> = 0x1E, then M = 32. This
yields a VCO output of 5 * 32 = 160 MHz, which is within
the 100-200 MHz ranged needed.
If PLLPOST<1:0> = 0, then N2 = 2. This provides a F
of 160/2 = 80 MHz. The resultant device operating
speed is 80/2 = 40 MIPS.
FIGURE 9-2:
TABLE 9-1:
© 2011 Microchip Technology Inc.
Fast RC Oscillator with Divide-by-N
(FRCDIVN)
Fast RC Oscillator with Divide-by-16
(FRCDIV16)
Low-Power RC Oscillator (LPRC)
Secondary (Timer1) Oscillator (SOSC)
Primary Oscillator (HS) with PLL
(HSPLL)
Primary Oscillator (XT) with PLL
(XTPLL)
Primary Oscillator (EC) with PLL
(ECPLL)
Primary Oscillator (HS)
Primary Oscillator (XT)
Primary Oscillator (EC)
Fast RC Oscillator with PLL (FRCPLL)
Fast RC Oscillator (FRC)
Note 1:
Source (Crystal, External Clock
or Internal RC)
Note 1: This frequency range must be satisfied at all times.
2:
Oscillator Mode
OSC2 pin function is determined by the OSCIOFNC Configuration bit.
This is the default oscillator mode for an unprogrammed (erased) device.
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
dsPIC33FJXXXMCX06A/X08A/X10A PLL BLOCK DIAGRAM
dsPIC33FJXXXMCX06A/X08A/X10A
Divide by
PLLPRE
2-33
N1
Oscillator Source
0.8-8.0 MHz
Secondary
Here
Primary
Primary
Primary
Primary
Primary
Primary
Internal
Internal
Internal
Internal
Internal
OSC
(1)
X
EQUATION 9-3:
POSCMD<1:0>
Divide by
PLLDIV
F
2-513
VCO
CY
M
xx
xx
xx
xx
10
01
00
10
01
00
xx
xx
=
100-200 MHz
F
-------------
OSC
Here
2
F
VCO
=
(1)
1
-- -
2
⎛
⎝
PLLPOST
XT WITH PLL MODE
EXAMPLE
10000000
------------------------------------ -
Divide by
2, 4, 8
FNOSC<2:0>
N2
2
⋅
111
110
101
100
011
011
011
010
010
010
001
000
2
⋅
12.5-80 MHz
32
DS70594C-page 147
Here
⎞
⎠
=
(1)
40 MIPS
See Note
F
1, 2
—
—
—
—
OSC
1
1
1
1
1
1
1