TDGL007 Microchip Technology, TDGL007 Datasheet - Page 176

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TDGL007

Manufacturer Part Number
TDGL007
Description
Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
Manufacturer
Microchip Technology
Datasheet

Specifications of TDGL007

Product
Development Boards
Interface Type
CAN, I2C
Operating Supply Voltage
5 V
dsPIC33FJXXXMCX06A/X08A/X10A
15.1
Configure the Output Compare modes by setting the
appropriate Output Compare Mode bits (OCM<2:0>) in
the Output Compare Control register (OCxCON<2:0>).
Table 15-1
Compare modes.
compare operation for various modes. The user
TABLE 15-1:
FIGURE 15-2:
DS70594C-page 176
OCM<2:0>
(OCM<2:0> = 110 or 111)
000
001
010
011
100
101
110
111
Active-High One-Shot
Active-Low One-Shot
Output Compare Modes
(OCM<2:0> = 001)
(OCM<2:0> = 010)
(OCM<2:0> = 011)
(OCM<2:0> = 100)
(OCM<2:0> = 101)
Delayed One-Shot
Continuous Pulse
lists the different bit settings for the Output
Module Disabled
Active-Low One-Shot
Active-High One-Shot
Toggle
Delayed One-Shot
Continuous Pulse
PWM without Fault Protection
PWM with Fault Protection
OUTPUT COMPARE MODES
Figure 15-2
Toggle
TMRy
PWM
OUTPUT COMPARE OPERATION
Mode
OCxRS
OCxR
Output Compare
Mode Enabled
illustrates the output
Current output is maintained
Controlled by GPIO register
‘1’ if OCxR is non-zero
‘1’ if OCxR is non-zero
OCx Pin Initial State
‘0’ if OCxR is zero,
‘0’ if OCxR is zero,
Timer is Reset on
0
1
0
0
application must disable the associated timer when
writing to the Output Compare Control registers to
avoid malfunctions.
Period Match
Note:
See Section 13. “Output Compare”
(DS70209) in the “dsPIC33F/PIC24H
Family Reference Manual” for OCxR and
OCxRS register restrictions.
OCx rising edge
OCx falling edge
OCx rising and falling edge
OCx falling edge
OCx falling edge
No interrupt
OCFA falling edge for OC1 to OC4
OCx Interrupt Generation
© 2011 Microchip Technology Inc.

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